flit · groleo · May 1, 2020 · May 16, 2021 · Jun 16, 2020 · May 18, 2021
diff --git a/projects.yaml b/projects.yaml
@@ -650,3 +650,7 @@ projects:
         - *module_if
         - *module_hic_lpc4322
         - records/board/hani_iot.yaml
+    lpc4322_mimxrt1170_evk_qspi_if:
+        - *module_if
+        - *module_hic_lpc4322
+        - records/board/mimxrt1170_evk_qspi.yaml
diff --git a/records/board/mimxrt1170_evk_qspi.yaml b/records/board/mimxrt1170_evk_qspi.yaml
@@ -0,0 +1,13 @@
+common:
+    macros:
+        - SOFT_RESET=VECTRESET
+        - SWO_UART=1
+        - SWO_USART_PORT=1
+    includes:
+        - source/family/nxp/mimxrt1170_spi_flash
+    sources:
+        board:
+            - source/board/mimxrt1170_evk.c
+        target:
+            - source/family/nxp/mimxrt1170_spi_flash/target.c
+            - source/family/freescale/target_reset_mimxrt.c
diff --git a/records/hic_hal/k26f.yaml b/records/hic_hal/k26f.yaml
@@ -11,6 +11,7 @@ common:
         - FLASH_DRIVER_IS_FLASH_RESIDENT=1
         - OS_CLOCK=120000000
     includes:
+        - source/cmsis-driver
         - source/hic_hal/freescale/k26f
         - source/hic_hal/freescale/k26f/MK26F18
         - source/hic_hal/freescale/iap

diff --git a/records/hic_hal/lpc4322.yaml b/records/hic_hal/lpc4322.yaml
@@ -10,10 +10,16 @@ common:
         - DAPLINK_HIC_ID=0x97969905  # DAPLINK_HIC_ID_LPC4322
         - OS_CLOCK=96000000
     includes:
+        - source/cmsis-driver
         - source/hic_hal/nxp/lpc4322
+        - source/hic_hal/nxp/lpc4322/RTE_Driver
+        - source/hic_hal/nxp/lpc4322/RTE_Driver/Config
     sources:
         hic_hal:
             - source/hic_hal/nxp/lpc4322
+            - source/hic_hal/nxp/lpc4322/RTE_Driver/SCU_LPC43xx.c
+            - source/hic_hal/nxp/lpc4322/RTE_Driver/USART_LPC43xx.c
+            - source/hic_hal/nxp/lpc4322/RTE_Driver/GPDMA_LPC43xx.c
 
 tool_specific:
     uvision:
@@ -31,6 +37,8 @@ tool_specific:
             hic_hal:
                 - source/hic_hal/nxp/lpc4322/armcc
     make_gcc_arm:
+        linker_file:
+            - source/hic_hal/nxp/lpc4322/gcc/lpc4322.ld
         includes:
             - source/hic_hal/nxp/lpc4322/gcc
         sources:

diff --git a/source/board/mimxrt1170_evk.c b/source/board/mimxrt1170_evk.c
@@ -0,0 +1,34 @@
+/**
+ * @file    mimxrt1170_evk.c
+ * @brief   board ID for the NXP MIMXRT1170-EVK board.
+ *
+ * DAPLink Interface Firmware
+ * Copyright (c) 2020 - 2021 NXP, All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "target_board.h"
+#include "target_family.h"
+
+const board_info_t g_board_info = {
+    .info_version = kBoardInfoVersion,
+    .board_id = "0244",
+    .family_id = kNXP_Mimxrt_FamilyID,
+    .flags = kEnablePageErase,
+    .daplink_url_name   = "PRODINFOHTM",
+    .daplink_drive_name = "RT1170-EVK",
+    .daplink_target_url = "http://www.nxp.com/imxrt1170evk",
+    .target_cfg = &target_device,
+};
diff --git a/source/cmsis-core/cmsis_gcc.h b/source/cmsis-core/cmsis_gcc.h
@@ -175,7 +175,7 @@ __STATIC_FORCEINLINE __NO_RETURN void __cmsis_start(void)
 #endif
 
 #ifndef __VECTOR_TABLE
-#define __VECTOR_TABLE            __Vectors
+#define __VECTOR_TABLE            __isr_vector
 #endif
 
 #ifndef __VECTOR_TABLE_ATTRIBUTE

diff --git a/...ce/hic_hal/freescale/k26f/Driver_Common.h → source/cmsis-driver/Driver_Common.h b/...ce/hic_hal/freescale/k26f/Driver_Common.h → source/cmsis-driver/Driver_Common.h
diff --git a/source/hic_hal/freescale/k26f/Driver_USART.h → source/cmsis-driver/Driver_USART.h b/source/hic_hal/freescale/k26f/Driver_USART.h → source/cmsis-driver/Driver_USART.h
diff --git a/source/family/freescale/target_reset_mimxrt.c b/source/family/freescale/target_reset_mimxrt.c
@@ -23,6 +23,7 @@
 #include "info.h"
 #include "target_family.h"
 #include "cmsis_os2.h"
+#include "target_config.h"
 
 static void target_before_init_debug(void)
 {
@@ -47,14 +48,20 @@ static void prerun_target_config(void)
 
 static uint8_t validate_bin_nvic(const uint8_t *buf)
 {
+    extern target_cfg_t target_device ;
+
     if(buf[0] == 'F' && buf[1] == 'C' && buf[2] == 'F' && buf[3] == 'B')
     {
+        target_device.flash_regions[0].start = 0x30000400;
         return 1;
     }
-    else
+    else if(buf[0] == 0xFF && buf[1] == 0xFF && buf[2] == 0xFF && buf[3] == 0xFF)
     {
-        return 0;
+        target_device.flash_regions[0].start = 0x30000000;
+        return 1;
     }
+
+    return 0;
 }
 
 const target_family_descriptor_t g_nxp_mimxrt = {

diff --git a/source/family/nxp/mimxrt1170_spi_flash/flash_blob.c b/source/family/nxp/mimxrt1170_spi_flash/flash_blob.c
@@ -0,0 +1,98 @@
+/* Flash OS Routines (Automagically Generated)
+ * Copyright (c) 2020 - 2021 NXP, All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+static const uint32_t DAPLINK_RT1170_flash_prog_blob[] = {
+    0xE00ABE00, 0x062D780D, 0x24084068, 0xD3000040, 0x1E644058, 0x1C49D1FA, 0x2A001E52, 0x4770D1F2,
+    0x4770ba40, 0x4770ba40, 0x4770bac0, 0x4770bac0, 0x49414770, 0x4449b510, 0x460a483e, 0x493f6008,
+    0x44492001, 0xf894f000, 0xd1062800, 0x2001493b, 0xf0004449, 0x2800f878, 0x2001d000, 0x2000bd10,
+    0xb5704770, 0x460d4613, 0x4604460a, 0x46184601, 0xf8b2f000, 0xd0012800, 0xbd702000, 0xbd701960,
+    0x4f2db5f8, 0x4d2e2600, 0x4634444f, 0x444d1f3f, 0x492a6c6b, 0x43604618, 0x44491982, 0xf0002001,
+    0x1c64f86d, 0x2c806038, 0xbdf8dbf2, 0x0107b5f8, 0x093f4e23, 0x444e2400, 0x4628e00d, 0x491f4360,
+    0x462b19c2, 0x20014449, 0xf858f000, 0x4449491a, 0x1c641f09, 0x6c756008, 0x46292001, 0xf0000300,
+    0x42a0f8a8, 0x4814d8e9, 0x1f004448, 0xbdf86800, 0x0106b570, 0x09364812, 0x6c444448, 0x46214615,
+    0xf0004630, 0x2900f896, 0x490cd106, 0x46324623, 0x20014449, 0xf832f000, 0x462b4908, 0x44494632,
+    0xf0002001, 0x4904f816, 0x1f094449, 0xbd706008, 0x00004770, 0xc0000005, 0x00000008, 0x00000010,
+    0x00000190, 0x22214770, 0x69d20412, 0x685268d2, 0xb4304710, 0x04242421, 0x68e469e4, 0x46a468a4,
+    0x4760bc30, 0x04122221, 0x68d269d2, 0x471068d2, 0x041b2321, 0x68db69db, 0x47186a5b, 0x2421b430,
+    0x69e40424, 0x692468e4, 0xbc3046a4, 0xb5384760, 0x94009c04, 0x04242421, 0x68e469e4, 0x47a06964,
+    0xb430bd38, 0x04242421, 0x68e469e4, 0x46a46a24, 0x4760bc30, 0x04122221, 0x68d269d2, 0x471069d2,
+    0x04092121, 0x68c969c9, 0x47086989, 0x04122221, 0x68d269d2, 0x47106b92, 0xb5104603, 0x079b430b,
+    0x2a04d10f, 0xc808d30d, 0x1f12c910, 0xd0f842a3, 0xba21ba18, 0xd9014288, 0xbd102001, 0x43c02000,
+    0x2a00bd10, 0x07d3d003, 0x1c52d003, 0x2000e007, 0x7803bd10, 0x1c40780c, 0x1b1b1c49, 0x7803d107,
+    0x1c40780c, 0x1b1b1c49, 0x1e92d101, 0x4618d1f1, 0x2200bd10, 0x428b0903, 0x0a03d32c, 0xd311428b,
+    0x469c2300, 0x4603e04e, 0xd43c430b, 0x08432200, 0xd331428b, 0x428b0903, 0x0a03d31c, 0xd301428b,
+    0xe03f4694, 0x428b09c3, 0x01cbd301, 0x41521ac0, 0x428b0983, 0x018bd301, 0x41521ac0, 0x428b0943,
+    0x014bd301, 0x41521ac0, 0x428b0903, 0x010bd301, 0x41521ac0, 0x428b08c3, 0x00cbd301, 0x41521ac0,
+    0x428b0883, 0x008bd301, 0x41521ac0, 0x428b0843, 0x004bd301, 0x41521ac0, 0xd2001a41, 0x41524601,
+    0x47704610, 0x0fcae05d, 0x4249d000, 0xd3001003, 0x40534240, 0x469c2200, 0x428b0903, 0x0a03d32d,
+    0xd312428b, 0x018922fc, 0x0a03ba12, 0xd30c428b, 0x11920189, 0xd308428b, 0x11920189, 0xd304428b,
+    0xd03a0189, 0xe0001192, 0x09c30989, 0xd301428b, 0x1ac001cb, 0x09834152, 0xd301428b, 0x1ac0018b,
+    0x09434152, 0xd301428b, 0x1ac0014b, 0x09034152, 0xd301428b, 0x1ac0010b, 0x08c34152, 0xd301428b,
+    0x1ac000cb, 0x08834152, 0xd301428b, 0x1ac0008b, 0xd2d94152, 0x428b0843, 0x004bd301, 0x41521ac0,
+    0xd2001a41, 0x46634601, 0x105b4152, 0xd3014610, 0x2b004240, 0x4249d500, 0x46634770, 0xd300105b,
+    0xb5014240, 0x46c02000, 0xbd0246c0, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+    0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000
+};
+
+// Start address of flash
+static const uint32_t flash_start = 0x30000000;
+// Size of flash
+static const uint32_t flash_size = 0x00800000;
+
+/**
+* List of start and size for each size of flash sector - even indexes are start, odd are size
+* The size will apply to all sectors between the listed address and the next address
+* in the list.
+* The last pair in the list will have sectors starting at that address and ending
+* at address flash_start + flash_size.
+*/
+static const sector_info_t sectors_info[] = {
+    {0x30000000, 0x00001000},
+};
+
+static const program_target_t flash = {
+    0x20000033,                         // .init
+    0x2000005f,                         // .uninit
+    0x20000081,                         // .erase_chip
+    0x200000ad,                         // .erase_sector
+    0x200000f1,                         // .program_page
+    0x0,                                // .verify
+    {                                   // .sys_call_s
+        0x20000001,                     // .breakpoint   : start of blob + 1
+        0x2000038C,                     // .static_base  : blob start + header + rw data offset
+        0x20002800                      // .stack_pointer
+    },
+    0x20000000 + 0x00003000,            // mem buffer location
+    0x20000000,                         // location to write prog_blob in target RAM
+    sizeof(DAPLINK_RT1170_flash_prog_blob), // prog_blob size
+    DAPLINK_RT1170_flash_prog_blob,     // address of prog_blob
+    0x00000100                          // .algo_flags: ram_to_flash_bytes_to_be_written
+};
diff --git a/source/family/nxp/mimxrt1170_spi_flash/target.c b/source/family/nxp/mimxrt1170_spi_flash/target.c
@@ -0,0 +1,37 @@
+/**
+ * @file    target.c
+ * @brief   Target information for the NXP MIMXRT1170-EVK board.
+ *
+ * DAPLink Interface Firmware
+ * Copyright (c) 2020 - 2021 NXP, All Rights Reserved
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "target_config.h"
+
+// The file flash_blob.c must only be included in target.c
+#include "flash_blob.c"
+
+ // target information
+target_cfg_t target_device = {
+    .sectors_info                   = sectors_info,
+    .sector_info_length             = (sizeof(sectors_info))/(sizeof(sector_info_t)),
+    .flash_regions[0].start         = 0x30000000,
+    .flash_regions[0].end           = 0x30000000 + MB(64),
+    .flash_regions[0].flags         = kRegionIsDefault,
+    .flash_regions[0].flash_algo    = (program_target_t *) &flash,
+    .ram_regions[0].start           = 0x30000000,
+    .ram_regions[0].end             = 0x30000000 + MB(64),
+};
diff --git a/source/hic_hal/nxp/lpc4322/DAP_config.h b/source/hic_hal/nxp/lpc4322/DAP_config.h
@@ -57,7 +57,7 @@ typedef unsigned int    BOOL;
 /// requrie 2 processor cycles for a I/O Port Write operation.  If the Debug Unit uses
 /// a Cortex-M0+ processor with high-speed peripheral I/O only 1 processor cycle might be
 /// required.
-#define IO_PORT_WRITE_CYCLES  2               ///< I/O Cycles: 2=default, 1=Cortex-M0+ fast I/0
+#define IO_PORT_WRITE_CYCLES  1               ///< I/O Cycles: 2=default, 1=Cortex-M0+ fast I/0
 
 /// Indicate that Serial Wire Debug (SWD) communication mode is available at the Debug Access Port.
 /// This information is returned by the command \ref DAP_Info as part of <b>Capabilities</b>.
@@ -83,17 +83,19 @@ typedef unsigned int    BOOL;
 /// Maximum Package Size for Command and Response data.
 /// This configuration settings is used to optimized the communication performance with the
 /// debugger and depends on the USB peripheral. Change setting to 1024 for High-Speed USB.
-#define DAP_PACKET_SIZE       64              ///< USB: 64 = Full-Speed, 1024 = High-Speed.
+#define DAP_PACKET_SIZE       512              ///< USB: 64 = Full-Speed, 1024 = High-Speed.
 
 /// Maximum Package Buffers for Command and Response data.
 /// This configuration settings is used to optimized the communication performance with the
 /// debugger and depends on the USB peripheral. For devices with limited RAM or USB buffer the
 /// setting can be reduced (valid range is 1 .. 255). Change setting to 4 for High-Speed USB.
-#define DAP_PACKET_COUNT      1              ///< Buffers: 64 = Full-Speed, 4 = High-Speed.
+#define DAP_PACKET_COUNT      8              ///< Buffers: 64 = Full-Speed, 4 = High-Speed.
 
 /// Indicate that UART Serial Wire Output (SWO) trace is available.
 /// This information is returned by the command \ref DAP_Info as part of <b>Capabilities</b>.
+#if !defined(SWO_UART)
 #define SWO_UART                0               ///< SWO UART:  1 = available, 0 = not available
+#endif
 
 /// Maximum SWO UART Baudrate
 #define SWO_UART_MAX_BAUDRATE   10000000U       ///< SWO UART Maximum Baudrate in Hz
@@ -106,7 +108,9 @@ typedef unsigned int    BOOL;
 #define SWO_BUFFER_SIZE         4096U           ///< SWO Trace Buffer Size in bytes (must be 2^n)
 
 /// SWO Streaming Trace.
+#if !defined(SWO_STREAM)
 #define SWO_STREAM              0               ///< SWO Streaming Trace: 1 = available, 0 = not available.
+#endif
 
 /// Clock frequency of the Test Domain Timer. Timer value is returned with \ref TIMESTAMP_GET.
 #define TIMESTAMP_CLOCK         1000000U      ///< Timestamp clock in Hz (0 = timestamps not supported).
@@ -151,6 +155,11 @@ extern BOOL gpio_reset_pin_is_input;
 #define PIN_SWDIO_TXE_IN_BIT  8
 #define PIN_SWDIO_TXE         (1<<PIN_SWDIO_TXE_IN_BIT)
 
+// SWO Pin                    P1_14:  GPIO1[7]
+#define PORT_SWO              1
+#define PIN_SWO_IN_BIT        7
+#define PIN_SWO               (1<<PIN_SWO_IN_BIT)
+
 // nRESET Pin                 P2_5:  GPIO5[5]
 #define PORT_nRESET           5
 #define PIN_nRESET_IN_BIT     5
@@ -161,15 +170,27 @@ extern BOOL gpio_reset_pin_is_input;
 #define PIN_RESET_TXE_IN_BIT  6
 #define PIN_RESET_TXE         (1<<PIN_RESET_TXE_IN_BIT)
 
-// ISP Control Pin          P2_11:  GPIO1[11]
-#define ISPCTRL_PORT        1
-#define ISPCTRL_BIT         11
+// ISP Control Pin            P2_11:  GPIO1[11]
+#define PORT_ISPCTRL          1
+#define PIN_ISPCTRL_IN_BIT    11
+#define PIN_ISPCTRL           (1<<PIN_ISPCTRL_IN_BIT)
+
+// Connected LED              P1_1: GPIO0[8]
+#define PORT_LED_CONNECTED    0
+#define PIN_LED_CONNECTED_IN_BIT   8
+#define PIN_LED_CONNECTED     (1<<PIN_LED_CONNECTED_IN_BIT)
+
+// Power Enable               P3_1: GPIO5[8]
+#define PORT_POWER_EN         5
+#define PIN_POWER_EN_BIT      8
+#define PIN_POWER_EN          (1<<PIN_POWER_EN_BIT)
 
 #define X_SET(str)     LPC_GPIO_PORT->SET[PORT_##str] = PIN_##str
 #define X_CLR(str)     LPC_GPIO_PORT->CLR[PORT_##str] = PIN_##str
 #define X_DIR_OUT(str) LPC_GPIO_PORT->DIR[PORT_##str] |= (PIN_##str)
 #define X_DIR_IN(str)  LPC_GPIO_PORT->DIR[PORT_##str] &= ~(PIN_##str)
 #define X_BYTE(str)    LPC_GPIO_PORT->B[(PORT_##str << 5) + PIN_##str##_IN_BIT]
+#define X_WORD(str)    LPC_GPIO_PORT->W[(PORT_##str << 5) + PIN_##str##_IN_BIT]
 
 
 //**************************************************************************************************
@@ -454,6 +475,11 @@ It is recommended to provide the following LEDs for status indication:
 */
 __STATIC_INLINE void LED_CONNECTED_OUT(uint32_t bit)
 {
+    if (bit) {
+        X_SET(LED_CONNECTED);
+    } else {
+        X_CLR(LED_CONNECTED);
+    }
 }
 
 /** Debug Unit: Set status Target Running LED.