avx512f: implement slide_left and slide_right.#1148
Merged
serge-sans-paille merged 1 commit intoxtensor-stack:masterfrom Jul 24, 2025
Merged
avx512f: implement slide_left and slide_right.#1148serge-sans-paille merged 1 commit intoxtensor-stack:masterfrom
serge-sans-paille merged 1 commit intoxtensor-stack:masterfrom
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|
FYI, the reason why I'm interested in those slide_left is because my code requires a Is this a method you're interested in as part of XSIMD's public API? |
With a fast path for N = 4*i and a split version else (inspired from avx512bw).
As the vpermd actually has the lower latency on some intel cpus compared to vpermw / vpermb, also use it instead of the avx512bw and avx512vbmi implementations if trivially possible.
Also reverse the order of the slow path for lower latency. It used to be:
```
SLR -> PERM ->
OR -> PERM
SLL ->
```
Now the latency is reduced to:
```
SLR -> PERM ->
OR
SLL -> PERM ->
```
And it should now generate even better code on avx512bw with N=63 with only one PERM (as already done for N=1).
For N=16,32,48, it prefers vshufi32x4 over vpermd for lower latency on Zen4 and decreased register usage.
Contributor
|
cumsum... isn't that https://xsimd.readthedocs.io/en/latest/api/reducer_index.html#_CPPv4I00E10reduce_add1TRK5batchI1T1AE ? |
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With a fast path for N = 4*i and a split version else (inspired from avx512bw).
As the vpermd actually has the lower latency on some intel cpus compared to vpermw / vpermb, also use it instead of the avx512bw and avx512vbmi implementations if trivially possible.
Also reverse the order of the slow path for lower latency. It used to be:
Now the latency is reduced to:
And it should now generate even better code on avx512bw with N=63 with only one PERM (as already done for N=1).
For N=16,32,48, it prefers vshufi32x4 over vpermd for lower latency on Zen4 and decreased register usage.