[pull] master from ruby:master

configure.ac

@@ -1372,6 +1372,7 @@ AC_CHECK_HEADERS(process.h)
 AC_CHECK_HEADERS(pwd.h)
 AC_CHECK_HEADERS(sanitizer/asan_interface.h)
 AC_CHECK_HEADERS(sanitizer/msan_interface.h)
+AC_CHECK_HEADERS(sanitizer/tsan_interface.h)
 AC_CHECK_HEADERS(setjmpex.h)
 AC_CHECK_HEADERS(stdalign.h)
 AC_CHECK_HEADERS(stdio.h)

internal/sanitizers.h

@@ -29,6 +29,13 @@
 # endif
 #endif
 
+#ifdef HAVE_SANITIZER_TSAN_INTERFACE_H
+# if __has_feature(thread_sanitizer) || defined(__SANITIZE_THREAD__)
+#  define RUBY_TSAN_ENABLED
+#  include <sanitizer/tsan_interface.h>
+# endif
+#endif
+
 #include "ruby/internal/stdbool.h"     /* for bool */
 #include "ruby/ruby.h"          /* for VALUE */
 
@@ -42,6 +49,9 @@
 #elif defined(RUBY_MSAN_ENABLED)
     # define ATTRIBUTE_NO_ADDRESS_SAFETY_ANALYSIS(x) \
     __attribute__((__no_sanitize__("memory"), __noinline__)) x
+#elif defined(RUBY_TSAN_ENABLED)
+# define ATTRIBUTE_NO_ADDRESS_SAFETY_ANALYSIS(x) \
+    __attribute__((__no_sanitize__("thread"), __noinline__)) x
 #elif defined(NO_SANITIZE_ADDRESS)
 # define ATTRIBUTE_NO_ADDRESS_SAFETY_ANALYSIS(x) \
     NO_SANITIZE_ADDRESS(NOINLINE(x))

misc/tsan_suppressions.txt

@@ -30,13 +30,6 @@ race:check_reserved_signal_
 
 race_top:rb_check_deadlock
 
-# lock_owner
-race_top:thread_sched_setup_running_threads
-race_top:vm_lock_enter
-race_top:rb_ec_vm_lock_rec
-race_top:vm_lock_enter
-race_top:vm_locked
-
 # vm->ractor.sched.grq_cnt++
 race_top:ractor_sched_enq
 race_top:ractor_sched_deq
@@ -111,10 +104,6 @@ race_top:encoded_iseq_trace_instrument
 race:rb_iseq_trace_set_all
 race:rb_tracepoint_enable
 
-# We walk the machine stack looking for markable objects, a thread with the GVL
-# released could by mutating the stack with non-Ruby-objects
-race:rb_gc_mark_machine_context
-
 # GC enable/disable flag modifications race with object allocation flag reads
 race_top:rb_gc_impl_gc_disable
 race_top:rb_gc_impl_gc_enable

test/.excludes-zjit/TestFixnum.rb

@@ -1 +1,2 @@
+# Issue: https://github.com/Shopify/ruby/issues/646
 exclude(/test_/, 'Tests make ZJIT panic')

transcode.c

@@ -2889,6 +2889,7 @@ str_encode_associate(VALUE str, int encidx)
  *
  *  Like #encode, but applies encoding changes to +self+; returns +self+.
  *
+ *  Related: see {Modifying}[rdoc-ref:String@Modifying].
  */
 
 static VALUE

vm_core.h

@@ -2065,12 +2065,21 @@ void rb_ec_vm_lock_rec_release(const rb_execution_context_t *ec,
                                unsigned int recorded_lock_rec,
                                unsigned int current_lock_rec);
 
+/* This technically is a data race, as it's checked without the lock, however we
+ * check against a value only our own thread will write. */
+NO_SANITIZE("thread", static inline bool
+vm_locked_by_ractor_p(rb_vm_t *vm, rb_ractor_t *cr))
+{
+    VM_ASSERT(cr == GET_RACTOR());
+    return vm->ractor.sync.lock_owner == cr;
+}
+
 static inline unsigned int
 rb_ec_vm_lock_rec(const rb_execution_context_t *ec)
 {
     rb_vm_t *vm = rb_ec_vm_ptr(ec);
 
-    if (vm->ractor.sync.lock_owner != rb_ec_ractor_ptr(ec)) {
+    if (!vm_locked_by_ractor_p(vm, rb_ec_ractor_ptr(ec))) {
         return 0;
     }
     else {

vm_sync.c

@@ -12,7 +12,7 @@ void rb_ractor_sched_barrier_end(rb_vm_t *vm, rb_ractor_t *cr);
 static bool
 vm_locked(rb_vm_t *vm)
 {
-    return vm->ractor.sync.lock_owner == GET_RACTOR();
+    return vm_locked_by_ractor_p(vm, GET_RACTOR());
 }
 
 #if RUBY_DEBUG > 0

zjit/src/asm/arm64/arg/mod.rs

@@ -10,7 +10,6 @@ mod sys_reg;
 mod truncate;
 
 pub use bitmask_imm::BitmaskImmediate;
-#[cfg(target_arch = "aarch64")]
 pub use condition::Condition;
 pub use inst_offset::InstructionOffset;
 pub use sf::Sf;

zjit/src/asm/arm64/mod.rs

@@ -217,6 +217,7 @@ pub const fn bcond_offset_fits_bits(offset: i64) -> bool {
 
 /// B.cond - branch to target if condition is true
 pub fn bcond(cb: &mut CodeBlock, cond: u8, offset: InstructionOffset) {
+    _ = Condition;
     assert!(bcond_offset_fits_bits(offset.into()), "The offset must be 19 bits or less.");
     let bytes: [u8; 4] = BranchCond::bcond(cond, offset).into();
 
@@ -1138,14 +1139,13 @@ fn cbz_cbnz(num_bits: u8, op: bool, offset: InstructionOffset, rt: u8) -> [u8; 4
           rt as u32).to_le_bytes()
 }
 
-/*
 #[cfg(test)]
 mod tests {
     use super::*;
 
     /// Check that the bytes for an instruction sequence match a hex string
     fn check_bytes<R>(bytes: &str, run: R) where R: FnOnce(&mut super::CodeBlock) {
-        let mut cb = super::CodeBlock::new_dummy(128);
+        let mut cb = super::CodeBlock::new_dummy();
         run(&mut cb);
         assert_eq!(format!("{:x}", cb), bytes);
     }
@@ -1676,4 +1676,3 @@ mod tests {
         check_bytes("1f3c0072", |cb| tst(cb, W0, A64Opnd::new_uimm(0xffff)));
     }
 }
-*/

zjit/src/backend/arm64/mod.rs

@@ -11,12 +11,12 @@ use crate::cast::*;
 pub type Reg = A64Reg;
 
 // Callee-saved registers
-pub const _CFP: Opnd = Opnd::Reg(X19_REG);
-pub const _EC: Opnd = Opnd::Reg(X20_REG);
-pub const _SP: Opnd = Opnd::Reg(X21_REG);
+pub const CFP: Opnd = Opnd::Reg(X19_REG);
+pub const EC: Opnd = Opnd::Reg(X20_REG);
+pub const SP: Opnd = Opnd::Reg(X21_REG);
 
 // C argument registers on this platform
-pub const _C_ARG_OPNDS: [Opnd; 6] = [
+pub const C_ARG_OPNDS: [Opnd; 6] = [
     Opnd::Reg(X0_REG),
     Opnd::Reg(X1_REG),
     Opnd::Reg(X2_REG),
@@ -27,8 +27,8 @@ pub const _C_ARG_OPNDS: [Opnd; 6] = [
 
 // C return value register on this platform
 pub const C_RET_REG: Reg = X0_REG;
-pub const _C_RET_OPND: Opnd = Opnd::Reg(X0_REG);
-pub const _NATIVE_STACK_PTR: Opnd = Opnd::Reg(XZR_REG);
+pub const C_RET_OPND: Opnd = Opnd::Reg(X0_REG);
+pub const NATIVE_STACK_PTR: Opnd = Opnd::Reg(XZR_REG);
 
 // These constants define the way we work with Arm64's stack pointer. The stack
 // pointer always needs to be aligned to a 16-byte boundary.

zjit/src/backend/lir.rs

@@ -6,18 +6,15 @@ use crate::cruby::{Qundef, RUBY_OFFSET_CFP_PC, RUBY_OFFSET_CFP_SP, SIZEOF_VALUE_
 use crate::hir::SideExitReason;
 use crate::options::{debug, get_option};
 use crate::cruby::VALUE;
-use crate::backend::current::*;
 use crate::virtualmem::CodePtr;
 use crate::asm::{CodeBlock, Label};
 
-pub const EC: Opnd = _EC;
-pub const CFP: Opnd = _CFP;
-pub const SP: Opnd = _SP;
-
-pub const C_ARG_OPNDS: [Opnd; 6] = _C_ARG_OPNDS;
-pub const C_RET_OPND: Opnd = _C_RET_OPND;
-pub const NATIVE_STACK_PTR: Opnd = _NATIVE_STACK_PTR;
-pub use crate::backend::current::{Reg, C_RET_REG};
+pub use crate::backend::current::{
+    Reg,
+    EC, CFP, SP,
+    NATIVE_STACK_PTR,
+    C_ARG_OPNDS, C_RET_REG, C_RET_OPND,
+};
 
 // Memory operand base
 #[derive(Clone, Copy, PartialEq, Eq, Debug)]

zjit/src/backend/x86_64/mod.rs

@@ -11,12 +11,12 @@ use crate::cast::*;
 pub type Reg = X86Reg;
 
 // Callee-saved registers
-pub const _CFP: Opnd = Opnd::Reg(R13_REG);
-pub const _EC: Opnd = Opnd::Reg(R12_REG);
-pub const _SP: Opnd = Opnd::Reg(RBX_REG);
+pub const CFP: Opnd = Opnd::Reg(R13_REG);
+pub const EC: Opnd = Opnd::Reg(R12_REG);
+pub const SP: Opnd = Opnd::Reg(RBX_REG);
 
 // C argument registers on this platform
-pub const _C_ARG_OPNDS: [Opnd; 6] = [
+pub const C_ARG_OPNDS: [Opnd; 6] = [
     Opnd::Reg(RDI_REG),
     Opnd::Reg(RSI_REG),
     Opnd::Reg(RDX_REG),
@@ -27,8 +27,8 @@ pub const _C_ARG_OPNDS: [Opnd; 6] = [
 
 // C return value register on this platform
 pub const C_RET_REG: Reg = RAX_REG;
-pub const _C_RET_OPND: Opnd = Opnd::Reg(RAX_REG);
-pub const _NATIVE_STACK_PTR: Opnd = Opnd::Reg(RSP_REG);
+pub const C_RET_OPND: Opnd = Opnd::Reg(RAX_REG);
+pub const NATIVE_STACK_PTR: Opnd = Opnd::Reg(RSP_REG);
 
 impl CodeBlock {
     // The number of bytes that are generated by jmp_ptr