FFT implementation using CORDIC algorithm written in Verilog.
-
Updated
Sep 6, 2018 - Verilog
#
cordic-algorithm
Here are 27 public repositories matching this topic...
the Renaissance Repository, a collection of pedagogical codes associated with the forthcoming texts Renaissance Robotics and Numerical Renaissance, by Thomas Bewley
robotics special-functions quaternions random-number-generator numerical-algorithms gray-code cordic-algorithm bldc-motors
-
Updated
Oct 24, 2025 - MATLAB
Blackman-Harris Window functions (3-, 5-, 7-term etc.) from 1K to 64M points based only on LUTs and DSP48s FPGA resources. Main core - CORDIC like as DDS (sine / cosine generator)
fpga dsp matlab vhdl octave impulse-response verilog dds digital-signal-processing spectral-analysis cosine sine taylor-series cordic window-function kaiser-window cordic-algorithm taylor-method hann-window hamming-window
-
Updated
Aug 14, 2020 - VHDL
accurate scientific calculator with fractions inside
c-plus-plus arduino algorithms cpp mathematics atmega1284 numeric arithmetic scientific-calculator fraction rational-numbers calculators embedded-applications arithmetics seven-segment cordic continued-fractions rational-number-arithmetic cordic-algorithm cint96
-
Updated
Aug 5, 2022 - C
-
Updated
Dec 21, 2024 - Verilog
📐 CORDIC in Vectoring Mode, Computer Aided Design of Digital Systems course, University of Tehran
-
Updated
Aug 17, 2020 - Verilog
Digital System Design Project - Spring 2020
-
Updated
Aug 7, 2020 - Verilog
Javascript implementation of the CORDIC Algorithm that approximate trigonometric functions
-
Updated
Dec 22, 2017 - JavaScript
YAC - Yet Another CORDIC Core
-
Updated
Jun 26, 2018 - VHDL
Implementation of the CORDIC machine in circular rotation mode
-
Updated
Jan 27, 2022 - C++
CORDIC square root algorithm implemented in Xilinx FPGAs
-
Updated
Mar 12, 2018 - LLVM
Synthesizeable CORDIC processor in SystemVerilog.
-
Updated
Jun 2, 2020 - SystemVerilog
Self-project on describing CORDIC algorithm for calculation of arctan(y/x) using Verilog.
-
Updated
Aug 8, 2023 - Verilog
Time domain to logarithmic frequency domain converter, as the polyphase FFT do for the linear.
hardware signal-processing vhdl ghdl yosys hardware-description-language cordic-algorithm filtering-algorithm nextpnr-ice40
-
Updated
Jan 13, 2026 - VHDL
Implementation of the CORDIC machine in circular rotation mode
-
Updated
Jan 27, 2022 - C++
A synthesizable 16-stage pipelined CORDIC engine in Verilog for high-throughput sine and cosine calculation. 🚀
-
Updated
Mar 8, 2026 - Verilog
A collection of activation functions implemented in Bluespec for integration with hardware designs, ensuring IEEE 754 compliance
hardware vhdl verilog bluespec systemverilog hdl bluespec-systemverilog cordic cordic-algorithm bluespec-systemverilog-language
-
Updated
Dec 11, 2023 - Verilog
It is the CORDIC implementation in Verilog. CORDIC is a hardware algorithm (CORDIC 硬體演算法) based on simple additions/subtractions and bit shifts. It can compute trigonometric, hyperbolic, exponentials, logarithms, multiplication, division, square, and square-root. And it is widely used in digital signal processing (DSP), embedded systems and FPGAs.
algorithms hardware ics hardware-designs hardware-acceleration cordic ic-design low-cost cordic-algorithm hardware-algorithms
-
Updated
Jan 7, 2026 - Verilog
Summary of projects I did in VLSI desing.
-
Updated
Nov 8, 2020 - VHDL
Improve this page
Add a description, image, and links to the cordic-algorithm topic page so that developers can more easily learn about it.
Add this topic to your repo
To associate your repository with the cordic-algorithm topic, visit your repo's landing page and select "manage topics."