Add the compressed C.NOP, C.ADDi and modify the get_insn32 function

Add the C.JAL and C.ADDIW insn

Author: f74064054@mail.ncku.edu.tw

emu-rv32i.c

@@ -94,6 +94,10 @@ original copyright:
 #define DEBUG_EXTRA
 #endif
 
+#if 1
+#define RV32C
+#endif
+
 /* added by Shaos: */
 #define STRICT_RV32I
 #define FALSE (0)
@@ -216,12 +220,18 @@ int machine_running = TRUE;
 #define PRV_H 2
 #define PRV_M 3
 
+/* Instruction state*/
+#define CINSN 1
+#define INSN 0
+unsigned char insn_type;
+
 /* CPU state */
 uint32_t pc;
 uint32_t next_pc;
 uint32_t insn;
 uint32_t reg[32];
 
+
 uint8_t priv = PRV_M; /* see PRV_x */
 uint8_t fs; /* MSTATUS_FS value */
 uint8_t mxl; /* MXL field in MISA register */
@@ -770,7 +780,7 @@ int raise_interrupt()
 
 /* read 32-bit instruction from memory by PC */
 
-uint32_t get_insn32(uint32_t pc)
+uint32_t get_insn32(uint32_t pc, uint32_t *insn)
 {
 #ifdef DEBUG_EXTRA
     if(pc && pc < minmemr) minmemr = pc;
@@ -779,9 +789,14 @@ uint32_t get_insn32(uint32_t pc)
     uint32_t ptr = pc - ram_start;
     if (ptr > RAM_SIZE) return 1;
     uint8_t* p = ram + ptr;
-    if((p[0] & 0x03) < 3)
-        return p[0] | (p[1] << 8);
-    return p[0] | (p[1] << 8) | (p[2] << 16) | (p[3] << 24);
+#ifdef RV32C
+    if((p[0] & 0x03) < 3){
+        *insn = (p[0] | (p[1] << 8)) & 0x0000ffff;
+        return CINSN;
+    }
+#endif
+    *insn = p[0] | (p[1] << 8) | (p[2] << 16) | (p[3] << 24);
+    return INSN;
 }
 
 /* read 8-bit data from memory */
@@ -1055,10 +1070,22 @@ void execute_instruction()
     int32_t imm, cond, err;
     uint32_t addr, val=0, val2;
 
-    opcode = insn & 0x7f;
-    rd = (insn >> 7) & 0x1f;
-    rs1 = (insn >> 15) & 0x1f;
-    rs2 = (insn >> 20) & 0x1f;
+    uint16_t midpart;
+
+    if(insn_type == INSN){
+        opcode = insn & 0x7f;
+        rd = (insn >> 7) & 0x1f;
+        rs1 = (insn >> 15) & 0x1f;
+        rs2 = (insn >> 20) & 0x1f;
+    }
+
+#ifdef RV32C
+    if(insn_type == CINSN){
+        opcode = insn & 0x3;
+    }
+#endif
+
+
 
     switch(opcode) {
 
@@ -1906,10 +1933,72 @@ void execute_instruction()
         break;
 
 #endif
-#ifndef RV32C
-
-    case 1: /* Compressed insn */
-
+#ifdef RV32C
+    /* Compressed insn */
+    case 0:
+        break;
+    case 1:
+        funct3 = (insn >> 13) & 0x7;
+        midpart = (insn >> 2) & 0x07ff;
+        switch(funct3){
+        case 0: /* C.NOP, C.ADDI */
+            if( ((midpart >> 5) & 0x1f)  == 0){ /* C.NOP*/
+                return;
+            } else {
+                rs1 = rd = (midpart >> 5) & 0x1f;
+                imm = (midpart & 0x1f) | ((midpart >> 5) &  0x20);
+                val = reg[rs1] + imm;
+            }
+            break;
+        case 1: /* C.JAL, C.ADDIW */
+            switch(XLEN){
+            case 32:
+                imm = (midpart & 0x400) |
+                      ((midpart << 3) & 0x200) |
+                      (midpart & 0x170) |
+                      ((midpart << 2) & 0x40) |
+                      (midpart & 0x20) |
+                      ((midpart << 4) & 0x10) |
+                      ((midpart >> 6) & 0x8) |
+                      ((midpart >> 1) & 0x7);
+                imm = imm & 0xfffe;
+                if (rd != 0)
+                    reg[1] = pc + 2; /* Store the link to x1 register */
+                next_pc = (int32_t)(pc + imm);
+                if(next_pc > pc) forward_counter++;
+                else backward_counter++;
+                jump_counter++;
+                break;
+            case 64:
+            case 128:
+                rs1 = rd = (midpart >> 5) & 0x1f;
+                imm = (midpart >> (11 - 5)) |
+                      midpart & 0x1f;
+                val = reg[rs1] + imm;
+                break;
+            }
+            break;
+        case 2: /* C.LI */
+            break;
+        case 3: /* C.ADDI16SP, C.LUI */
+            break;
+        case 4: /* C.SRLI, C.SRLI64, C.SRAI, C.SRAI64, C.ANDI, C.SUB, C.XOR, C.OR, C.AND, C.SUBW, C.ADDW*/
+            break;
+        case 5: /* C.J */
+            break;
+        case 6: /* C.BEQZ */
+            break;
+        case 7: /* C.BNEZ */
+            break;
+        default:
+            raise_exception(CAUSE_ILLEGAL_INSTRUCTION, insn);
+            return;
+        }
+        if(rd != 0){
+            reg[rd] = val;
+        }
+        break;
+    case 2:
         break;
 
 #endif
@@ -1950,8 +2039,12 @@ void riscv_cpu_interp_x32()
         if ((mip & mie) != 0 && (mstatus & MSTATUS_MIE)) {
             raise_interrupt();
         } else {
-            /* normal instruction execution */
-            insn = get_insn32(pc);
+            /* Compressed or normal */
+            insn_type = get_insn32(pc, &insn);
+#ifdef RV32C
+            if(insn_type)
+                next_pc = pc + 2;
+#endif
 #ifdef DEBUG_EXTRA
             printf("insn : %#x\n", insn);
 #endif