[hist] Ensure consistency of RBinWithError::AtomicAdd #21105
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hahnjo merged 4 commits intoroot-project:masterfrom Feb 9, 2026
Merged
[hist] Ensure consistency of RBinWithError::AtomicAdd #21105hahnjo merged 4 commits intoroot-project:masterfrom
RBinWithError::AtomicAdd #21105hahnjo merged 4 commits intoroot-project:masterfrom
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Only have a single (private) function that invokes lower-level atomic operations on the two members fSum and fSum2.
Instead of using separate atomic operations on the two members, use the sign bit of fSum2 to implement a cheap spin lock. This allows another thread to detect inconsistent reads and implement a retry loop. According to the microbenchmarks, this is even faster with a single thread / for the uncontended case. A possible explanation is that the code needs only one compare-exchange operation instead of two. With multiple threads and heavy contention, the implementation is slightly slower. An alternative would be double-width compare-and-swap instructions, as found on x86 (cmpxchg16b). Setting aside the portability issues, GCC generates a library call to __atomic_compare_exchange_16 which is slower than two separate compare-exchange instructions. If a direct instruction is emitted (for example with Clang), it beats the separate compare-exchange instructions in the uncontended scenario and is tied in case of contention.
pcanal
reviewed
Feb 2, 2026
Test Results 22 files 22 suites 3d 12h 49m 9s ⏱️ Results for commit f639911. |
hageboeck
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Feb 4, 2026
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hageboeck
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LGTM in general, but for the future, should one think about preventing undesired modifications of the read-only arguments?
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Instead of using separate atomic operations on the two members, use the sign bit of
fSum2to implement a cheap spin lock. This allows another thread to detect inconsistent reads and implement a retry loop.According to the microbenchmarks, this is even faster with a single thread / for the uncontended case. A possible explanation is that the code needs only one compare-exchange operation instead of two. With multiple threads and heavy contention, the implementation is slightly slower.
An alternative would be double-width compare-and-swap instructions, as found on x86 (
cmpxchg16b). Setting aside the portability issues, GCC generates a library call to__atomic_compare_exchange_16which is slower than two separate compare-exchange instructions. If a direct instruction is emitted (for example with Clang), it beats the separate compare-exchange instructions in the uncontended scenario and is tied in case of contention.