[RISCV] Add support for TLSDESC#307
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Looks like the build failed because upstream LLVM does not emit R_RISCV_ALIGN. |
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@lenary please review |
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I would like to see tests using 'C' code as well. You can still keep the asm test. I would like to see more detailed testing mentioned below :
Please create subtasks as needed and totally I am ok to see the limited support that we add for 21.0 but my focus is to build this feature with more clarity. |
Just to clarify, this patch has full support for TLSDESC, including all 4 types of static relocations, linker optimizations (replacing instructions with nops) and relaxations (removing instructions). Of course, it may have bugs, which is the case with existing code, which could be fixed before the 21 releases. Since new requirements come 1 day before the 21.x feature deadline, it won't go into the release. Also, please clarify: Thank you |
Yes, sorry!. My point was to make TLSDESC without relaxation work before relaxations are added. Also cases such as TLSDESC with symbol visibility is something users typically do. We should look into those cases to make sure that we have tests that show functionality.
I think it will be useful to have --no-tlsdesc-relax like --no-gp-relax or --no-relax-c to have a workaround if any. Map file can be annotated to point out what relaxations were applied. |
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quic-seaswara
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Great!. Let us get it merged.
@lenary if you can go through it and have your comments, it would be great!
lenary
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I only have one high-level comment. Otherwise I'm happy.
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The last force push is only a rename no_riscv_tlsdesc -> no_relax_tlsdesc. |
Signed-off-by: Alexey Karyakin <akaryaki@quicinc.com>
Add '.yaml' to config.suffixes and fix tests that had non-test yaml files outside of their Inputs directory. Signed-off-by: Alexey Karyakin <akaryaki@quicinc.com>
The RISC-V psABI is silent on where R_RISCV_RELAX has to be in the relocation table relative to the affected relocation, as long as it is "at the same position". It is also not clear where exactly `.reloc` assembly directive must place the relocation. Therefore, sort all the RISC-V relocations. They were already sorted, but not always. Signed-off-by: Alexey Karyakin <akaryaki@quicinc.com>
Signed-off-by: Alexey Karyakin <akaryaki@qti.qualcomm.com>
Signed-off-by: Alexey Karyakin <akaryaki@qti.qualcomm.com>
Signed-off-by: Alexey Karyakin <akaryaki@qti.qualcomm.com>
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