Conversation
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Review requested:
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The AIX failure is real: FWIW I am separately testing a PR to update the CPU target for V8 on AIX to Power 9. I think (based on cc @lemire |
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Here is the internal logic in simdjson: // other code here
#elif defined(__PPC64__) || defined(_M_PPC64)
#define SIMDJSON_IS_PPC64 1
#if defined(__ALTIVEC__)
#define SIMDJSON_IS_PPC64_VMX 1
#endif // defined(__ALTIVEC__)and this is used as follows... #define SIMDJSON_IMPLEMENTATION_PPC64 (SIMDJSON_IS_PPC64 && SIMDJSON_IS_PPC64_VMX)So we should only enable altivec when Unfortunately, I do not have access to an AIX system. If you do, can you verify whether Note that we can just disable the whole thing by passing |
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@richardlau To be clearer, there is no runtime dispatching when building simdjson on POWER systems. We only enable the optimized kernel when |
This is an automated update of simdjson to 4.4.0.