[Circuit Diagrams] 1 - RIR debug metadata

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This is part of the groundwork for supporting the visualization of classical control in circuit diagrams.

To support classical control flow (branches) in circuit diagrams, we will use the RIR representation which we will transform into a circuit. To be able to preserve source information in the circuit diagram, we first need to emit source metadata into RIR. This also sets us up nicely to potentially emit LLVM debug metadata to QIR, if ever the need arises.

• Add a debug module to qsc_rir with structures modeled after LLVM's source-level debugging metadata (DbgLocation, DbgScope, DbgInfo). These track source offsets, callable scopes, loop body scopes (with per-iteration discriminators), and inline-at chains.
• Rename the Instruction enum to InstructionKind and introduce a new Instruction struct that pairs an InstructionKind with optional InstructionDbgMetadata. All RIR passes, codegen, builder helpers, and tests updated accordingly.
• During partial evaluation, populate debug metadata by tracking call site locations, callable scopes (SubProgram), and loop iteration scopes (LexicalBlockFile). Unused entries are pruned before returning the program.
• Add PartialEvalConfig with a generate_debug_metadata flag. Enabled for fir_to_rir (used by the VS Code extension for circuit/RIR views), disabled for fir_to_qir (text QIR output).
• Fix debug location assignment for short-circuit binary ops (&&, ||) — the continuation block now gets the correct source location.
• New test suite in debug_metadata.rs covering gates, measurements, loops, callable inlining, and short-circuit binary ops.

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