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[sram_ctrl,dv] Tweak sram_ctrl_readback_err_vseq#29738

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rswarbrick merged 1 commit intolowRISC:masterfrom
rswarbrick:sram-ctrl-readback
Apr 17, 2026
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[sram_ctrl,dv] Tweak sram_ctrl_readback_err_vseq#29738
rswarbrick merged 1 commit intolowRISC:masterfrom
rswarbrick:sram-ctrl-readback

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@rswarbrick rswarbrick commented Apr 9, 2026

This was originally motivated by trying to get the test to pass when
run under Xcelium as well as VCS, but there was some room for tidying
up the test.

Changes in this commit:

  • There are LOTS of comments that explain what is going on.

  • Sequence variables are now randomised in a slightly simpler
    manner (as rand class variables). The only hard bit was picking an
    unpacked config struct. The trick is to pick the index in the
    randomisation and then copy the value at that index in
    post_randomize.

  • We now allow a few extra TL reads after injecting the error. This
    wasn't done in the past. The scoreboard was fixed in the previous
    commit to allow such stimulus.

  • A check for integrity errors in cip_base_scoreboard needs
    disabling.

@rswarbrick rswarbrick added Component:DV DV issue: testbench, test case, etc. IP:sram_ctrl labels Apr 9, 2026
@rswarbrick rswarbrick requested a review from nasahlpa April 11, 2026 22:26
@rswarbrick rswarbrick marked this pull request as ready for review April 16, 2026 11:29
@rswarbrick rswarbrick requested a review from a team as a code owner April 16, 2026 11:29
@rswarbrick rswarbrick requested review from marnovandermaas and removed request for a team April 16, 2026 11:29
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@nasahlpa nasahlpa left a comment

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Thanks @rswarbrick, this now looks much cleaner than before. As far as I can see, the test does what it is supposed to do, so LGTM!

// A tuple that describes an FI path.
typedef struct {
// The HDL path
string path;
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Did you intend to align with L19?

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Yes, and I think it probably makes sense, making the structure slightly easier to read. Does that seem reasonable to you?

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sure

} fi_desc_s;

// If true, the generated memory operations will be writes. If false, they will be reads.
rand bit m_target_write;
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Could you remove extra space

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Yes, definitely. I was going to say "ah, but it's aligned with the guy below". True, but m_targeted_desc (below) isn't aligned. Let's drop the extras.


// A mask that gives the bits that should be flipped to inject a fault
uvm_hdl_data_t mask;
} fi_desc_s;
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I'd like it even more if verible was shouting to declare it as fi_desc_t_s but linters are not that smart.

This was originally motivated by trying to get the test to pass when
run under Xcelium as well as VCS, but there was some room for tidying
up the test.

Changes in this commit:

  - There are LOTS of comments that explain what is going on.

  - Sequence variables are now randomised in a slightly simpler
    manner (as rand class variables). The only hard bit was picking an
    unpacked config struct. The trick is to pick the index in the
    randomisation and then copy the value at that index in
    post_randomize.

  - We now allow a few extra TL reads after injecting the error. This
    wasn't done in the past. The scoreboard was fixed in the previous
    commit to allow such stimulus.

  - A check for integrity errors in cip_base_scoreboard needs
    disabling.

Signed-off-by: Rupert Swarbrick <rswarbrick@lowrisc.org>
@rswarbrick rswarbrick added this pull request to the merge queue Apr 17, 2026
Merged via the queue into lowRISC:master with commit 93692fe Apr 17, 2026
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3 participants