AArch64: Fix register access for LSE atomics#2953
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The base was briefly wrong when I opened this, so the labeler applied every arch/binding label. Base is now v5; only AArch64 and Python apply. I can't edit labels myself — could a maintainer clear the rest? Thanks! |
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Thanks! See the comment.
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This needs to be added to the bindings/python/Makefile on the v5 branch. Otherwise it is not run in the CI.
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Done — added a REGRESS_TESTS entry to the check target so CI runs it.
Note: the existing loop ran ./$t from bindings/python/, but the tests live in tests/, so it was already failing before any regress test. Fixed it to cd tests first. Can split that out if you'd rather.
The LSE atomics (CAS, CASP, SWP and the LD<op>/ST<op> families) had empty operand access, so cs_regs_access reported neither the value registers read nor the destination written. Populate the access table, and handle the CASP register pairs in AArch64_reg_access, whose second element gets no access info from the printer.
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Let me merge this one first: #2954 |
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Freaking v5 testing. I am so close to rewrite it. Anyways, the makefile way is broken and I removed that step from the workflow. Can you please revert the Makefile changes and add the test to Sorry for all the back and forth. I haven't looked at the v5 testing for a long time and forgot where is what done. |
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Detailed description
The AArch64 LSE atomics (CAS, CASP, SWP, and the LD/ST families) had empty operand-access
entries, so cs_regs_access() reported neither the value registers read nor the destination written. E.g.
swp w0, w1, [x2] reported only x2 read, nothing written.
Fixes:
without access info. Operands 0–1 are read+written, 2–3 read.
No API/struct changes.
Test plan
suite/regress/test_arm64_atomics.py asserts the read/written sets from regs_access() across the affected
families. Fails before the fix, passes after.
python3 suite/regress/test_arm64_atomics.py
Closing issues
None.