Add ESP32-P4 support

src/target/jtag_devs.c

@@ -413,6 +413,32 @@ const jtag_dev_descr_s dev_descr[] = {
 #endif
 		.handler = riscv_jtag_dtm_handler,
 	},
+	{
+		.idcode = 0x00012c25U,
+		.idmask = 0x0fffffffU,
+#if ENABLE_DEBUG == 1
+		.descr = "ESP32-P4",
+#endif
+		.handler = riscv_jtag_dtm_handler,
+		.ir_quirks =
+			{
+				.ir_length = 5U,
+				.ir_value = 5U,
+			},
+	},
+	{
+		.idcode = 0x00012c25U,
+		.idmask = 0x0fffffffU,
+#if ENABLE_DEBUG == 1
+		.descr = "ESP32-P4",
+#endif
+		.handler = riscv_jtag_dtm_handler,
+		.ir_quirks =
+			{
+				.ir_length = 5U,
+				.ir_value = 1U,
+			},
+	},
 #endif
 #if defined(CONFIG_CORTEXAR) // && defined(ENABLE_SITARA)
 	{

src/target/jtag_scan.c

@@ -208,11 +208,16 @@ static void jtag_display_idcodes(void)
 #endif
 }
 
-static jtag_ir_quirks_s jtag_device_get_quirks(const uint32_t idcode)
+static jtag_ir_quirks_s jtag_device_get_quirks(const uint32_t idcode, size_t *previous_idx)
 {
 	for (size_t idx = 0; dev_descr[idx].idcode; ++idx) {
-		if ((idcode & dev_descr[idx].idmask) == dev_descr[idx].idcode)
+		if ((idcode & dev_descr[idx].idmask) == dev_descr[idx].idcode) {
+			/* workaround for ESP32-P4 which has 2 different ir_value */
+			if (idcode == 0x12c25U && *previous_idx == idx)
+				idx++;
+			*previous_idx = idx;
 			return dev_descr[idx].ir_quirks;
+		}
 	}
 	return (jtag_ir_quirks_s){0};
 }
@@ -228,8 +233,9 @@ static bool jtag_read_irs(void)
 	size_t prescan = 0U;
 	size_t device = 0U;
 	uint8_t ir_len = 0U;
+	size_t previous_idx = 0U;
 	/* Grab the first device's quirks, if any */
-	jtag_ir_quirks_s ir_quirks = jtag_device_get_quirks(jtag_devs[0].jd_idcode);
+	jtag_ir_quirks_s ir_quirks = jtag_device_get_quirks(jtag_devs[0].jd_idcode, &previous_idx);
 
 	/* Try scanning out the IR for the device */
 	while (ir_len <= JTAG_MAX_IR_LEN) {
@@ -272,7 +278,7 @@ static bool jtag_read_irs(void)
 			++device;
 			ir_len = overrun;
 			/* Grab the device quirks for this new device, if any */
-			ir_quirks = jtag_device_get_quirks(jtag_devs[device].jd_idcode);
+			ir_quirks = jtag_device_get_quirks(jtag_devs[device].jd_idcode, &previous_idx);
 		}
 	}
 

src/target/riscv_debug.c

@@ -302,8 +302,31 @@ void riscv_dmi_init(riscv_dmi_s *const dmi)
 	/* The first DM is always at base address 0 */
 	uint32_t base_addr = 0U;
 	do {
+		/* Turn on DM before trying to read version  */
+		if (!riscv_dmi_write(dmi, base_addr + RV_DM_CONTROL, RV_DM_CTRL_ACTIVE)) {
+			DEBUG_ERROR("error turning on DM!\n");
+			return;
+		}
+
+		/* After changing the value of dm_active, the debugger must poll dmcontrol
+		 * until dm_active has taken the requested value */
+		bool dm_active = false;
+		uint32_t dm_control = 0U;
+		uint8_t counter = 0U;
+		while (!dm_active) {
+			if (!riscv_dmi_read(dmi, base_addr + RV_DM_CONTROL, &dm_control)) {
+				DEBUG_ERROR("error turning on DM!\n");
+				return;
+			}
+			dm_active = dm_control & 1U;
+			if (++counter >= 100U) {
+				DEBUG_ERROR("Timeout while trying to turn on DM\n");
+				return;
+			}
+		}
+
 		/* Read out the DM's status register */
-		uint32_t dm_status = 0;
+		uint32_t dm_status = 0U;
 		if (!riscv_dmi_read(dmi, base_addr + RV_DM_STATUS, &dm_status)) {
 			/* If we fail to read the status register, abort */
 			break;