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[TIR] Fix InjectPTXLDG32 segfaults and skip non-CUDA targets #18671
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[TIR] Fix InjectPTXLDG32 segfaults and skip non-CUDA targets #18671
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Summary of ChangesHello @LudovicoYIN, I'm Gemini Code Assist1! I'm currently reviewing this pull request and will post my feedback shortly. In the meantime, here's a summary to help you and other reviewers quickly get up to speed! This pull request addresses critical stability and correctness issues within the Highlights
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Code Review
This pull request addresses a segmentation fault in InjectPTXLDG32 that occurred when processing functions without any Allocate nodes. It also correctly restricts the pass to run only on CUDA targets. The changes are well-implemented, ensuring temporary buffers are created when needed, either within an existing Allocate scope or at the function level. The addition of new tests effectively validates both the bug fix and the new target-specific behavior. I have one suggestion to refactor a small piece of duplicated code to enhance maintainability.
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@spectrometerHBH @vinx13 |
Motivation
InjectPTXLDG32 rewrites BufferStore when encountering if_then_else, but it only
initializes temporary buffers when an Allocate node exists. For functions without
Allocate, this leads to uninitialized buffers and a hard segfault during compilation.
In addition, the PTX-only pass can run on CPU/LLVM targets when tir.ptx_ldg32=1,
injecting PTX intrinsics that are invalid for non-CUDA codegen.
This PR ensures temporary buffers are created even when no Allocate exists, and
skips InjectPTXLDG32 on non-CUDA targets, preventing segfaults and invalid PTX
intrinsics on CPU.
Changes
Testing
test_tir_transform_inject_ptx_ldg32.py
Fixes