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Unify x86/x86-64 ABI handling in SIMD prologues and CPU-feature probes#69

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Xor-el merged 6 commits into
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chore/simd-cleanup
May 21, 2026
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Unify x86/x86-64 ABI handling in SIMD prologues and CPU-feature probes#69
Xor-el merged 6 commits into
masterfrom
chore/simd-cleanup

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@Xor-el Xor-el commented May 21, 2026

Centralizes the x86-64 ABI decision behind a single HASHLIB_SYSV_X64_ABI
define, deduplicates non-volatile register save/restore across SIMD
assembly bodies, trims branches not reachable in practice, and tightens
the CPU-feature probe shim. No algorithmic changes.

Key changes

  • HashLib.inc defines HASHLIB_SYSV_X64_ABI when HASHLIB_X86_64 AND NOT HASHLIB_MSWINDOWS.
    All SIMD prologues and CPU-feature shims now gate SysV remapping on
    this symbol, decoupling ABI from compiler vendor and fixing the
    previously-broken assumption that "non-Windows ⇒ FPC."
  • SimdProc{1..6}Begin_x86_64.inc collapse their nested {$IFDEF FPC}
    / {$IFDEF MSWINDOWS} structure to two flat axes (frame directive,
    ABI). MS-ABI stack-load lines in files 5 and 6 are now written once.
  • SimdProc{1..6}Begin_i386.inc collapse the identical FPC and
    Delphi-Win32 branches (files 1–3) and drop dead Delphi-non-Windows
    branches (files 4–6).
  • All x86-64 SIMD bodies (Adler32, Argon2, BLAKE2/3, SHA-1/256/512,
    Keccak, SHA-NI) now save/restore XMM6+, RDI, RSI unconditionally
    rather than under {$IFDEF MSWINDOWS}. Comments updated accordingly.
  • i386 SIMD bodies save XMM6/XMM7 unconditionally, with comments noting
    this is defensive (i386 has no caller-saved XMM contract).
  • CpuIdQuery.inc / XGetBvQuery.inc switch to HASHLIB_SYSV_X64_ABI,
    rewrite the IA-32 entry-state comments to show registers at entry
    rather than mid-shuffle, and gain inline ABI-normalization comments.
  • TX86SimdFeatures: TCpuIdResult moved to implementation-section
    type; CpuIdQuery / XGetBvQuery forward declarations take typed
    out parameters instead of Pointer; six identical kill-blocks in
    ApplyBuildOverrides factored into DisableAllExtraFeatures.
  • Blake3_HashMany_Scalar comment reworded — the routine is correct on
    any little-endian target, not specifically x86.

What didn't change

  • No instruction sequences in any SIMD body modified.
  • Byte-identical digests on every test vector across every SIMD tier.
  • No public API changes to TX86SimdFeatures.
  • No new conditional defines required from callers.

@Xor-el Xor-el merged commit 714a526 into master May 21, 2026
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@Xor-el Xor-el deleted the chore/simd-cleanup branch May 21, 2026 12:24
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