Merge to tag jdk-27+15

make/autoconf/jdk-options.m4

@@ -102,6 +102,13 @@ AC_DEFUN_ONCE([JDKOPT_SETUP_JDK_OPTIONS],
       CHECKING_MSG: [if we should build headless-only (no GUI)])
   AC_SUBST(ENABLE_HEADLESS_ONLY)
 
+  # Avoid headless-only on macOS and Windows, it is not supported there
+  if test "x$ENABLE_HEADLESS_ONLY" = xtrue; then
+    if test "x$OPENJDK_TARGET_OS" = xwindows || test "x$OPENJDK_TARGET_OS" = xmacosx; then
+      AC_MSG_ERROR([headless-only is not supported on macOS and Windows])
+    fi
+  fi
+
   # should we linktime gc unused code sections in the JDK build ?
   if test "x$OPENJDK_TARGET_OS" = "xlinux"; then
     if test "x$OPENJDK_TARGET_CPU" = "xs390x" || test "x$OPENJDK_TARGET_CPU" = "xppc64le"; then

make/modules/java.desktop/lib/ClientLibraries.gmk

@@ -338,11 +338,8 @@ else
   # noexcept-type required for GCC 7 builds. Not required for GCC 8+.
   # expansion-to-defined required for GCC 9 builds. Not required for GCC 10+.
   # maybe-uninitialized required for GCC 8 builds. Not required for GCC 9+.
-  # calloc-transposed-args required for GCC 14 builds. (fixed upstream in
-  #  Harfbuzz 032c931e1c0cfb20f18e5acb8ba005775242bd92)
   HARFBUZZ_DISABLED_WARNINGS_CXX_gcc := class-memaccess noexcept-type \
-      expansion-to-defined dangling-reference maybe-uninitialized \
-      calloc-transposed-args
+      expansion-to-defined dangling-reference maybe-uninitialized
   HARFBUZZ_DISABLED_WARNINGS_clang := missing-field-initializers \
       range-loop-analysis unused-variable
   HARFBUZZ_DISABLED_WARNINGS_microsoft := 4267 4244

make/modules/jdk.jpackage/Java.gmk

@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2020, 2025, Oracle and/or its affiliates. All rights reserved.
+# Copyright (c) 2020, 2026, Oracle and/or its affiliates. All rights reserved.
 # DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 #
 # This code is free software; you can redistribute it and/or modify it
@@ -29,7 +29,7 @@ DISABLED_WARNINGS_java += dangling-doc-comments
 
 COPY += .gif .png .txt .spec .script .prerm .preinst \
     .postrm .postinst .list .sh .desktop .copyright .control .plist .template \
-    .icns .scpt .wxs .wxl .wxi .wxf .ico .bmp .tiff .service .xsl
+    .icns .scpt .wxs .wxl .wxi .wxf .ico .bmp .tiff .service .xsl .js
 
 CLEAN += .properties
 

make/test/JtregNativeJdk.gmk

@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2015, 2025, Oracle and/or its affiliates. All rights reserved.
+# Copyright (c) 2015, 2026, Oracle and/or its affiliates. All rights reserved.
 # DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 #
 # This code is free software; you can redistribute it and/or modify it
@@ -63,7 +63,8 @@ ifeq ($(call isTargetOs, windows), true)
   BUILD_JDK_JTREG_EXCLUDE += libDirectIO.c libInheritedChannel.c \
       libExplicitAttach.c libImplicitAttach.c \
       exelauncher.c libFDLeaker.c exeFDLeakTester.c \
-      libChangeSignalDisposition.c exePrintSignalDisposition.c
+      libChangeSignalDisposition.c exePrintSignalDisposition.c \
+      libConcNativeFork.c libPipesCloseOnExec.c
 
   #SapMachine 2024-06-12: Exclude libCreateNewProcessGroupOnSpawnTest.c from native compilation on Windows
   BUILD_JDK_JTREG_EXCLUDE += libCreateNewProcessGroupOnSpawnTest.c
@@ -80,6 +81,9 @@ else
   BUILD_JDK_JTREG_LIBRARIES_LDFLAGS_libLinkerInvokerUnnamed := -pthread
   BUILD_JDK_JTREG_LIBRARIES_LDFLAGS_libLinkerInvokerModule := -pthread
   BUILD_JDK_JTREG_LIBRARIES_LDFLAGS_libLoaderLookupInvoker := -pthread
+  BUILD_JDK_JTREG_LIBRARIES_LDFLAGS_libConcNativeFork := -pthread
+  BUILD_JDK_JTREG_LIBRARIES_LDFLAGS_libPipesCloseOnExec := -pthread
+  BUILD_JDK_JTREG_LIBRARIES_LDFLAGS_libLoaderLookupInvoker := -pthread
 
   BUILD_JDK_JTREG_LIBRARIES_LDFLAGS_libExplicitAttach := -pthread
   BUILD_JDK_JTREG_LIBRARIES_LDFLAGS_libImplicitAttach := -pthread

src/hotspot/cpu/aarch64/aarch64.ad

@@ -2524,10 +2524,6 @@ uint Matcher::float_pressure_limit()
   return (FLOATPRESSURE == -1) ? _FLOAT_REG_mask.size() : FLOATPRESSURE;
 }
 
-bool Matcher::use_asm_for_ldiv_by_con(jlong divisor) {
-  return false;
-}
-
 const RegMask& Matcher::divI_proj_mask() {
   ShouldNotReachHere();
   return RegMask::EMPTY;

src/hotspot/cpu/arm/arm.ad

@@ -1,5 +1,5 @@
 //
-// Copyright (c) 2008, 2025, Oracle and/or its affiliates. All rights reserved.
+// Copyright (c) 2008, 2026, Oracle and/or its affiliates. All rights reserved.
 // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 //
 // This code is free software; you can redistribute it and/or modify it
@@ -1112,10 +1112,6 @@ uint Matcher::float_pressure_limit()
   return (FLOATPRESSURE == -1) ? 30 : FLOATPRESSURE;
 }
 
-bool Matcher::use_asm_for_ldiv_by_con( jlong divisor ) {
-  return false;
-}
-
 // Register for DIVI projection of divmodI
 const RegMask& Matcher::divI_proj_mask() {
   ShouldNotReachHere();

src/hotspot/cpu/ppc/assembler_ppc.hpp

@@ -1580,10 +1580,6 @@ class Assembler : public AbstractAssembler {
   static bool is_nop(int x) {
     return x == 0x60000000;
   }
-  // endgroup opcode for Power6
-  static bool is_endgroup(int x) {
-    return is_ori(x) && inv_ra_field(x) == 1 && inv_rs_field(x) == 1 && inv_d1_field(x) == 0;
-  }
 
 
  private:
@@ -1659,9 +1655,6 @@ class Assembler : public AbstractAssembler {
   inline void ori_opt( Register d, int ui16);
   inline void oris_opt(Register d, int ui16);
 
-  // endgroup opcode for Power6
-  inline void endgroup();
-
   // count instructions
   inline void cntlzw(  Register a, Register s);
   inline void cntlzw_( Register a, Register s);

src/hotspot/cpu/ppc/assembler_ppc.inline.hpp

@@ -253,8 +253,6 @@ inline void Assembler::mr(      Register d, Register s)   { Assembler::orr(d, s,
 inline void Assembler::ori_opt( Register d, int ui16)     { if (ui16!=0) Assembler::ori( d, d, ui16); }
 inline void Assembler::oris_opt(Register d, int ui16)     { if (ui16!=0) Assembler::oris(d, d, ui16); }
 
-inline void Assembler::endgroup()                         { Assembler::ori(R1, R1, 0); }
-
 // count instructions
 inline void Assembler::cntlzw(  Register a, Register s)              { emit_int32(CNTLZW_OPCODE | rta(a) | rs(s) | rc(0)); }
 inline void Assembler::cntlzw_( Register a, Register s)              { emit_int32(CNTLZW_OPCODE | rta(a) | rs(s) | rc(1)); }

src/hotspot/cpu/ppc/disassembler_ppc.cpp

@@ -119,9 +119,6 @@ address Disassembler::decode_instruction0(address here, outputStream * st, addre
   } else if (instruction == 0xbadbabe) {
     st->print(".data 0xbadbabe");
     next = here + Assembler::instr_len(here);
-  } else if (Assembler::is_endgroup(instruction)) {
-    st->print("endgroup");
-    next = here + Assembler::instr_len(here);
   } else {
     next = here;
   }

src/hotspot/cpu/ppc/macroAssembler_ppc.cpp

@@ -483,7 +483,7 @@ void MacroAssembler::set_dest_of_bc_far_at(address instruction_addr, address des
     // variant 3, far cond branch to the next instruction, already patched to nops:
     //
     //    nop
-    //    endgroup
+    //    nop
     //  SKIP/DEST:
     //
     return;
@@ -500,7 +500,7 @@ void MacroAssembler::set_dest_of_bc_far_at(address instruction_addr, address des
   if (is_bc_far_variant2_at(instruction_addr) && dest == instruction_addr + 8) {
     // Far branch to next instruction: Optimize it by patching nops (produce variant 3).
     masm.nop();
-    masm.endgroup();
+    masm.nop();
   } else {
     if (is_bc_far_variant1_at(instruction_addr)) {
       // variant 1, the 1st instruction contains the destination address:

src/hotspot/cpu/ppc/macroAssembler_ppc.hpp

@@ -70,14 +70,6 @@ class MacroAssembler: public Assembler {
   // Move register if destination register and target register are different
   inline void mr_if_needed(Register rd, Register rs, bool allow_invalid = false);
   inline void fmr_if_needed(FloatRegister rd, FloatRegister rs);
-  // This is dedicated for emitting scheduled mach nodes. For better
-  // readability of the ad file I put it here.
-  // Endgroups are not needed if
-  //  - the scheduler is off
-  //  - the scheduler found that there is a natural group end, in that
-  //    case it reduced the size of the instruction used in the test
-  //    yielding 'needed'.
-  inline void endgroup_if_needed(bool needed);
 
   // Memory barriers.
   inline void membar(int bits);

src/hotspot/cpu/ppc/macroAssembler_ppc.inline.hpp

@@ -1,6 +1,6 @@
 /*
- * Copyright (c) 2002, 2025, Oracle and/or its affiliates. All rights reserved.
- * Copyright (c) 2012, 2025 SAP SE. All rights reserved.
+ * Copyright (c) 2002, 2026, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 2012, 2026 SAP SE. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
@@ -72,11 +72,6 @@ inline void MacroAssembler::mr_if_needed(Register rd, Register rs, bool allow_no
 inline void MacroAssembler::fmr_if_needed(FloatRegister rd, FloatRegister rs) {
   if (rs != rd) fmr(rd, rs);
 }
-inline void MacroAssembler::endgroup_if_needed(bool needed) {
-  if (needed) {
-    endgroup();
-  }
-}
 
 inline void MacroAssembler::membar(int bits) {
   // Comment: Usage of elemental_membar(bits) is not recommended for Power 8.
@@ -240,13 +235,13 @@ inline bool MacroAssembler::is_bc_far_variant3_at(address instruction_addr) {
   // Variant 3, far cond branch to the next instruction, already patched to nops:
   //
   //    nop
-  //    endgroup
+  //    nop
   //  SKIP/DEST:
   //
   const int instruction_1 = *(int*)(instruction_addr);
   const int instruction_2 = *(int*)(instruction_addr + 4);
   return is_nop(instruction_1) &&
-         is_endgroup(instruction_2);
+         is_nop(instruction_2);
 }
 
 // set dst to -1, 0, +1 as follows: if CR0bi is "greater than", dst is set to 1,

src/hotspot/cpu/ppc/ppc.ad

@@ -2457,10 +2457,6 @@ uint Matcher::float_pressure_limit()
   return (FLOATPRESSURE == -1) ? 28 : FLOATPRESSURE;
 }
 
-bool Matcher::use_asm_for_ldiv_by_con(jlong divisor) {
-  return false;
-}
-
 // Register for DIVI projection of divmodI.
 const RegMask& Matcher::divI_proj_mask() {
   ShouldNotReachHere();
@@ -14362,20 +14358,6 @@ instruct tlsLoadP(threadRegP dst) %{
 
 //---Some PPC specific nodes---------------------------------------------------
 
-// Stop a group.
-instruct endGroup() %{
-  ins_cost(0);
-
-  ins_is_nop(true);
-
-  format %{ "End Bundle (ori r1, r1, 0)" %}
-  size(4);
-  ins_encode %{
-    __ endgroup();
-  %}
-  ins_pipe(pipe_class_default);
-%}
-
 // Nop instructions
 
 instruct fxNop() %{

src/hotspot/cpu/riscv/riscv.ad

@@ -2111,10 +2111,6 @@ uint Matcher::float_pressure_limit()
   return (FLOATPRESSURE == -1) ? _FLOAT_REG_mask.size() : FLOATPRESSURE;
 }
 
-bool Matcher::use_asm_for_ldiv_by_con(jlong divisor) {
-  return false;
-}
-
 const RegMask& Matcher::divI_proj_mask() {
   ShouldNotReachHere();
   return RegMask::EMPTY;

src/hotspot/cpu/riscv/vm_version_riscv.hpp

@@ -55,7 +55,7 @@ class VM_Version : public Abstract_VM_Version {
 
    public:
     RVFeatureValue(const char* pretty, int linux_bit_num, bool fstring) :
-      _pretty(pretty), _feature_string(fstring), _linux_feature_bit(nth_bit(linux_bit_num)) {
+      _pretty(pretty), _feature_string(fstring), _linux_feature_bit(nth_bit<uint64_t>(linux_bit_num)) {
     }
     virtual void enable_feature(int64_t value = 0) = 0;
     virtual void disable_feature() = 0;

src/hotspot/cpu/s390/s390.ad

@@ -1929,10 +1929,6 @@ uint Matcher::float_pressure_limit()
   return (FLOATPRESSURE == -1) ? 15 : FLOATPRESSURE;
 }
 
-bool Matcher::use_asm_for_ldiv_by_con(jlong divisor) {
-  return false;
-}
-
 // Register for DIVI projection of divmodI
 const RegMask& Matcher::divI_proj_mask() {
   return _Z_RARG4_INT_REG_mask;

src/hotspot/cpu/x86/globals_x86.hpp

@@ -117,9 +117,6 @@ define_pd_global(intx, InitArrayShortSize, 8*BytesPerLong);
   product(bool, UseIncDec, true, DIAGNOSTIC,                                \
           "Use INC, DEC instructions on x86")                               \
                                                                             \
-  product(bool, UseNewLongLShift, false,                                    \
-          "Use optimized bitwise shift left")                               \
-                                                                            \
   product(bool, UseAddressNop, false,                                       \
           "Use '0F 1F [addr]' NOP instructions on x86 cpus")                \
                                                                             \

src/hotspot/cpu/x86/vm_version_x86.cpp

@@ -1508,9 +1508,6 @@ void VM_Version::get_processor_features() {
         MaxLoopPad = 11;
       }
 #endif // COMPILER2
-      if (FLAG_IS_DEFAULT(UseXMMForArrayCopy)) {
-        UseXMMForArrayCopy = true; // use SSE2 movq on new ZX cpus
-      }
       if (supports_sse4_2()) { // new ZX cpus
         if (FLAG_IS_DEFAULT(UseUnalignedLoadStores)) {
           UseUnalignedLoadStores = true; // use movdqu on newest ZX cpus
@@ -1528,10 +1525,6 @@ void VM_Version::get_processor_features() {
       // Use it on new AMD cpus starting from Opteron.
       UseAddressNop = true;
     }
-    if (supports_sse2() && FLAG_IS_DEFAULT(UseNewLongLShift)) {
-      // Use it on new AMD cpus starting from Opteron.
-      UseNewLongLShift = true;
-    }
     if (FLAG_IS_DEFAULT(UseXmmLoadAndClearUpper)) {
       if (supports_sse4a()) {
         UseXmmLoadAndClearUpper = true; // use movsd only on '10h' Opteron
@@ -1571,10 +1564,6 @@ void VM_Version::get_processor_features() {
       if (FLAG_IS_DEFAULT(AllocatePrefetchInstr)) {
         FLAG_SET_DEFAULT(AllocatePrefetchInstr, 3);
       }
-      // On family 15h processors use XMM and UnalignedLoadStores for Array Copy
-      if (supports_sse2() && FLAG_IS_DEFAULT(UseXMMForArrayCopy)) {
-        FLAG_SET_DEFAULT(UseXMMForArrayCopy, true);
-      }
       if (supports_sse2() && FLAG_IS_DEFAULT(UseUnalignedLoadStores)) {
         FLAG_SET_DEFAULT(UseUnalignedLoadStores, true);
       }
@@ -1591,9 +1580,6 @@ void VM_Version::get_processor_features() {
     if (cpu_family() >= 0x17) {
       // On family >=17h processors use XMM and UnalignedLoadStores
       // for Array Copy
-      if (supports_sse2() && FLAG_IS_DEFAULT(UseXMMForArrayCopy)) {
-        FLAG_SET_DEFAULT(UseXMMForArrayCopy, true);
-      }
       if (supports_sse2() && FLAG_IS_DEFAULT(UseUnalignedLoadStores)) {
         FLAG_SET_DEFAULT(UseUnalignedLoadStores, true);
       }
@@ -1640,9 +1626,6 @@ void VM_Version::get_processor_features() {
       }
 #endif // COMPILER2
 
-      if (FLAG_IS_DEFAULT(UseXMMForArrayCopy)) {
-        UseXMMForArrayCopy = true; // use SSE2 movq on new Intel cpus
-      }
       if ((supports_sse4_2() && supports_ht()) || supports_avx()) { // Newest Intel cpus
         if (FLAG_IS_DEFAULT(UseUnalignedLoadStores)) {
           UseUnalignedLoadStores = true; // use movdqu on newest Intel cpus

src/hotspot/cpu/x86/x86.ad

@@ -2763,13 +2763,6 @@ uint Matcher::float_pressure_limit()
   return (FLOATPRESSURE == -1) ? default_float_pressure_threshold : FLOATPRESSURE;
 }
 
-bool Matcher::use_asm_for_ldiv_by_con( jlong divisor ) {
-  // In 64 bit mode a code which use multiply when
-  // devisor is constant is faster than hardware
-  // DIV instruction (it uses MulHiL).
-  return false;
-}
-
 // Register for DIVI projection of divmodI
 const RegMask& Matcher::divI_proj_mask() {
   return INT_RAX_REG_mask();

src/hotspot/os/linux/hugepages.cpp

@@ -35,16 +35,16 @@
 #include <dirent.h>
 
 ExplicitHugePageSupport::ExplicitHugePageSupport() :
-  _initialized(false), _pagesizes(), _pre_allocated_pagesizes(), _default_hugepage_size(SIZE_MAX), _inconsistent(false) {}
+  _initialized{false}, _os_supported{}, _pre_allocated{}, _default_hugepage_size{SIZE_MAX}, _inconsistent{false} {}
 
-os::PageSizes ExplicitHugePageSupport::pagesizes() const {
+os::PageSizes ExplicitHugePageSupport::os_supported() const {
   assert(_initialized, "Not initialized");
-  return _pagesizes;
+  return _os_supported;
 }
 
-os::PageSizes ExplicitHugePageSupport::pre_allocated_pagesizes() const {
+os::PageSizes ExplicitHugePageSupport::pre_allocated() const {
   assert(_initialized, "Not initialized");
-  return _pre_allocated_pagesizes;
+  return _pre_allocated;
 }
 
 size_t ExplicitHugePageSupport::default_hugepage_size() const {
@@ -151,7 +151,7 @@ static os::PageSizes filter_pre_allocated_hugepages(os::PageSizes pagesizes) {
 void ExplicitHugePageSupport::print_on(outputStream* os) {
   if (_initialized) {
     os->print_cr("Explicit hugepage support:");
-    for (size_t s = _pagesizes.smallest(); s != 0; s = _pagesizes.next_larger(s)) {
+    for (size_t s = _os_supported.smallest(); s != 0; s = _os_supported.next_larger(s)) {
       os->print_cr("  hugepage size: " EXACTFMT, EXACTFMTARGS(s));
     }
     os->print_cr("  default hugepage size: " EXACTFMT, EXACTFMTARGS(_default_hugepage_size));
@@ -166,13 +166,13 @@ void ExplicitHugePageSupport::print_on(outputStream* os) {
 void ExplicitHugePageSupport::scan_os() {
   _default_hugepage_size = scan_default_hugepagesize();
   if (_default_hugepage_size > 0) {
-    _pagesizes = scan_hugepages();
-    _pre_allocated_pagesizes = filter_pre_allocated_hugepages(_pagesizes);
+    _os_supported = scan_hugepages();
+    _pre_allocated = filter_pre_allocated_hugepages(_os_supported);
     // See https://www.kernel.org/doc/Documentation/vm/hugetlbpage.txt: /proc/meminfo should match
     // /sys/kernel/mm/hugepages/hugepages-xxxx. However, we may run on a broken kernel (e.g. on WSL)
     // that only exposes /proc/meminfo but not /sys/kernel/mm/hugepages. In that case, we are not
     // sure about the state of hugepage support by the kernel, so we won't use explicit hugepages.
-    if (!_pagesizes.contains(_default_hugepage_size)) {
+    if (!_os_supported.contains(_default_hugepage_size)) {
       log_info(pagesize)("Unexpected configuration: default pagesize (%zu) "
                          "has no associated directory in /sys/kernel/mm/hugepages.", _default_hugepage_size);
       _inconsistent = true;