New OQD end-to-end pipeline is added to Catalyst

[rniczh]

Context:

Description of the Change:

This pipeline enables Catalyst to compile circuit for ARTIQ-based quantum device. When device_db configuration is provided, the compilation follows the ARTIQ route:

• ions-decomposition: Decompose quantum operations for trapped ion systems
• gates-to-pulses: Convert gate operations to pulse sequences
• convert-ion-to-rtio: Convert ion operations to RTIO dialect
• convert-rtio-event-to-artiq: Lower RTIO event to ARTIQ's primitives
• llvm-dialect-lowering-stage: Lower to LLVM IR
• emit-artiq-runtime: Generate ARTIQ runtime entry point as wrapper for ARITQ device to execute

The final stage compiles LLVM IR to an ELF binary targeting the ARTIQ device (ARM Cortex-A9). Due to current limitations where Catalyst's internal LLVM build does not include the corresponding ARM backend, the compilation will use llc to compile .ll to object file, and use ld.lld to compile to .elf

Replace the artiq configs to your own env setting:

import os

import numpy as np
import pennylane as qml

from catalyst import qjit
from catalyst.third_party.oqd import OQDDevice, OQDDevicePipeline

OQD_PIPELINES = OQDDevicePipeline(
    os.path.join("calibration_data", "device.toml"),
    os.path.join("calibration_data", "qubit.toml"),
    os.path.join("calibration_data", "gate.toml"),
    os.path.join("device_db", "device_db.json"),
)


def test_rx_gate():
    oqd_dev = OQDDevice(
        backend="default",
        shots=4,
        wires=1,
        artiq_config={
            "kernel_ld": "<path_to_artiq_kernel_liker_script>/kernel.ld",
            "llc_path": "<path_to_llc>/llc",
            "lld_path": "<path_to_ld.lld>/ld.lld",
        },
    )

    @qjit(pipelines=OQD_PIPELINES)
    @qml.qnode(oqd_dev)
    def circuit():
        x = np.pi / 2
        qml.RX(x, wires=0)
        return qml.counts(wires=0)

    circuit()


test_rx_gate()

The result will store in the circuit/

[ARTIQ] Generated ELF: <path_to_workspace>/circuit/circuit.elf
[ARTIQ] Object files saved in workspace: <path_to_workspace>/circuit

And you can run it on artiq device:

artiq_run  --device-db device_db.py circuit.elf

Benefits:

Possible Drawbacks:
It causes the OQD specific compile stuffs steps into the original catalyst compiler driver's pipepline

TODOs: (Need further discussions)

• Get rid of llc
• Enable ARMv7 target for LLVM (requires to rebuild llvm)
• OS command injection

Related GitHub Issues:
[sc-100853]

[rniczh]

OS command Injection

[rniczh]

If we want to use LLVM C++ API to compile it to object file directly without llc steps in, we need to add ARM target when building LLVM

-DLLVM_TARGETS_TO_BUILD="host;ARM" 

And on more thing should be noted is that the we also need to build lld to get the linker as well.

Need lld in LLVM_PROJECTS, for clarification:
LLVM_ENABLE_LLD=ON is different, this is about using lld as the linker during LLVM’s own build, not necessarily building the ld.lld binary

LLVM_PROJECTS ?= mlir;lld

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