[OMNIML-5025] specdec_bench cell t0_d7 — google/gemma-4-E4B-it / MTP / vllm#1695
[OMNIML-5025] specdec_bench cell t0_d7 — google/gemma-4-E4B-it / MTP / vllm#1695ChenhanYu wants to merge 5 commits into
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Signed-off-by: Pensieve Intern <chenhany@nvidia.com>
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✨ Finishing Touches🧪 Generate unit tests (beta)
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Signed-off-by: Pensieve Intern <chenhany@nvidia.com>
Signed-off-by: Pensieve Intern <chenhany@nvidia.com>
Signed-off-by: Pensieve Intern <chenhany@nvidia.com>
Signed-off-by: Pensieve Intern <chenhany@nvidia.com>
Codecov Report✅ All modified and coverable lines are covered by tests. Additional details and impacted files@@ Coverage Diff @@
## main #1695 +/- ##
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+ Coverage 67.72% 67.73% +0.01%
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Files 511 511
Lines 56168 56168
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+ Hits 38037 38043 +6
+ Misses 18131 18125 -6
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Adds the per-cell runtime params for SPEED-bench gemma-4-E4B-it / MTP / vLLM cell t0_d7.
Sweep: gemma-4-E4B-it_mtp_vllm_t0_d7