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[OMNIML-5025] specdec_bench cell t0_d7 — google/gemma-4-E4B-it / MTP / vllm#1695

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[OMNIML-5025] specdec_bench cell t0_d7 — google/gemma-4-E4B-it / MTP / vllm#1695
ChenhanYu wants to merge 5 commits into
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Adds the per-cell runtime params for SPEED-bench gemma-4-E4B-it / MTP / vLLM cell t0_d7.

Sweep: gemma-4-E4B-it_mtp_vllm_t0_d7

Signed-off-by: Pensieve Intern <chenhany@nvidia.com>
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Signed-off-by: Pensieve Intern <chenhany@nvidia.com>
Signed-off-by: Pensieve Intern <chenhany@nvidia.com>
Signed-off-by: Pensieve Intern <chenhany@nvidia.com>
Signed-off-by: Pensieve Intern <chenhany@nvidia.com>
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Codecov Report

✅ All modified and coverable lines are covered by tests.
✅ Project coverage is 67.73%. Comparing base (dd49a46) to head (f8d942c).
⚠️ Report is 1 commits behind head on main.

Additional details and impacted files
@@            Coverage Diff             @@
##             main    #1695      +/-   ##
==========================================
+ Coverage   67.72%   67.73%   +0.01%     
==========================================
  Files         511      511              
  Lines       56168    56168              
==========================================
+ Hits        38037    38043       +6     
+ Misses      18131    18125       -6     
Flag Coverage Δ
unit 54.34% <ø> (+0.01%) ⬆️

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