Add awareness of some Armv8.1-M branch instructions

decoder/source/i_dec/trc_idec_arminst.cpp

@@ -163,6 +163,16 @@ int inst_Thumb_is_direct_branch_link(uint32_t inst, uint8_t *is_link, uint8_t *i
     } else if ((inst & 0xf5000000) == 0xb1000000) {
         /* CB(NZ) */
         *is_cond = 1;
+    } else if ((inst & 0xfffff001) == 0xf00fc001) {
+        /* LE (encoding T1) */
+    } else if ((inst & 0xfffff001) == 0xf02fc001) {
+        /* LE (encoding T2) */
+    } else if ((inst & 0xfffff001) == 0xf01fc001) {
+        /* LETP (encoding T3) */
+    } else if ((inst & 0xfff0f001) == 0xf040c001) {
+        /* WLS (encoding T1) */
+    } else if ((inst & 0xffc0f001) == 0xf000c001) {
+        /* WLSTP (encoding T3) */
     } else {
         is_direct_branch = 0;
     }
@@ -503,6 +513,26 @@ int inst_Thumb_branch_destination(uint32_t addr, uint32_t inst, uint32_t *pnpc)
         npc = addr + 4 + ((((inst & 0x02000000) << 6) |
                            ((inst & 0x00f80000) << 7)) >> 25);
         npc |= 1;
+    } else if ((inst & 0xfffff001) == 0xf00fc001) {
+        /* LE (encoding T1) */
+        npc = addr + 4 - (((inst & 0x000007fe) << 1) | ((inst & 0x00000800) >> 10));
+        npc |= 1;
+    } else if ((inst & 0xfffff001) == 0xf02fc001) {
+        /* LE (encoding T2) */
+        npc = addr + 4 - (((inst & 0x000007fe) << 1) | ((inst & 0x00000800) >> 10));
+        npc |= 1;
+    } else if ((inst & 0xfffff001) == 0xf01fc001) {
+        /* LETP (encoding T3) */
+        npc = addr + 4 - (((inst & 0x000007fe) << 1) | ((inst & 0x00000800) >> 10));
+        npc |= 1;
+    } else if ((inst & 0xfff0f001) == 0xf040c001) {
+        /* WLS (encoding T1) */
+        npc = addr + 4 + (((inst & 0x000007fe) << 1) | ((inst & 0x00000800) >> 10));
+        npc |= 1;
+    } else if ((inst & 0xffc0f001) == 0xf000c001) {
+        /* WLSTP (encoding T3) */
+        npc = addr + 4 + (((inst & 0x000007fe) << 1) | ((inst & 0x00000800) >> 10));
+        npc |= 1;
     } else {
         is_direct_branch = 0;
     }

decoder/source/trc_core_arch_map.cpp

@@ -65,6 +65,7 @@ static ap_map_elem_t ap_map_array[] =
     { "Cortex-R5", { ARCH_V7, profile_CortexR } },
     { "Cortex-R4", { ARCH_V7, profile_CortexR } },
     { "Cortex-M33", { ARCH_V8, profile_CortexM } },
+    { "Cortex-M55", { ARCH_V8, profile_CortexM } },
     { "Cortex-M23", { ARCH_V8, profile_CortexM } },
     { "Cortex-M0", { ARCH_V7, profile_CortexM } },
     { "Cortex-M0+", { ARCH_V7, profile_CortexM } },

decoder/tests/run_pkt_decode_tests.bash

@@ -51,23 +51,25 @@ SNAPSHOT_DIR=./snapshots
 BIN_DIR=./bin/linux64/rel/
 
 # directories for tests using full decode
-declare -a test_dirs_decode=( "juno-ret-stck"
+declare -a test_dirs_decode=( 
+                              "Snowball"
+                              "TC2"
                               "a57_single_step"
+                              "armv8_1m_branches"
                               "bugfix-exact-match"
+                              "itm_only_csformat"                              
+                              "itm_only_raw"
+                              "juno-ret-stck"
                               "juno-uname-001"
                               "juno-uname-002"
                               "juno_r1_1"
-                              "tc2-ptm-rstk-t32"
-                              "trace_cov_a15"
+                              "stm-issue-27"
                               "stm_only"
                               "stm_only-2"
                               "stm_only-juno"
-                              "stm-issue-27"
-                              "TC2"
-                              "Snowball"
+                              "tc2-ptm-rstk-t32"
                               "test-file-mem-offsets"
-                              "itm_only_raw"
-                              "itm_only_csformat"                              
+                              "trace_cov_a15"
                             )
 
 

decoder/tests/snapshots/armv8_1m_branches/cpu_0.ini

@@ -0,0 +1,18 @@
+[device]
+name=cpu_0
+class=core
+type=Cortex-M55
+
+[regs]
+PC(size:32)=0x4F9A02
+SP(size:32)=0
+SCTLR_EL1=0x1007
+CPSR=0x1C5
+
+[dump.text1]
+file=range1.bin
+address=0x1E008
+
+[dump.text2]
+file=range2.bin
+address=0x4F9A02

decoder/tests/snapshots/armv8_1m_branches/etm_0.ini

@@ -0,0 +1,18 @@
+[device]
+name=etm_0
+class=trace_source
+type=ETM4
+
+[regs]
+TRCCONFIGR(0x004)=0x00000001
+TRCTRACEIDR(0x010)=0x00000000
+TRCAUTHSTATUS(0x3EE)=0x000000CC
+TRCIDR0(0x078)=0x280006E1
+TRCIDR1(0x079)=0x4100F454
+TRCIDR2(0x07A)=0x00000004
+TRCIDR8(0x060)=0x00000000
+TRCIDR9(0x061)=0x00000000
+TRCIDR10(0x062)=0x00000000
+TRCIDR11(0x063)=0x00000000
+TRCIDR12(0x064)=0x00000001
+TRCIDR13(0x065)=0x00000000

decoder/tests/snapshots/armv8_1m_branches/snapshot.ini

@@ -0,0 +1,9 @@
+[snapshot]
+version=1.0
+
+[device_list]
+device0=cpu_0.ini
+device1=etm_0.ini
+
+[trace]
+metadata=trace.ini

decoder/tests/snapshots/armv8_1m_branches/trace.ini

@@ -0,0 +1,13 @@
+[trace_buffers]
+buffers=buffer0
+
+[buffer0]
+name=etr_0
+file=trace.bin
+format=source_data
+
+[source_buffers]
+etm_0=etr_0
+
+[core_trace_sources]
+cpu_0=etm_0