A2 "Hydrogen"

A2 Hydrogen is an FPGA soft processor compatible with the ARMv2 instruction set architecture. Designed with simplicity in mind. It's a part of a bigger SOC that I'm working on and will be the core of the whole system.

Features

• Simple Design: With a focus on simplicity, A2 offers a 3-stage pipelined architecture without unnecessary complexity, making it ideal for budged FPGAs.
• ARMv2 Compatibility: A2 is compatible with the most of ARMv2 instruction set. GCC support for it was only dropped in 2019. (It's not even that long ago!)
• Simple Memory Interface: The core features a single memory access port, simplifying memory management and reducing overhead.
• Instruction Support: A2 supports all ARMv2 instructions except for coprocessor-related operations, providing comprehensive functionality for most applications.
• Non-ISA Features Support: A2 supports all non-ISA features of the ARM architecture, that includes interrupts and User/Supervisor operation modes.
• Similar to VL86C010 IC: Inspired by the VL86C010 integrated circuit, A2 offers similar memory interface, making it simple to integrate with a memory subsystem.

More Information

ISA Support

All operations approved by GNU assembler were tested. "Weird" instructions like memory access with address write-back to the PC register are not supported. Co-processor instructions were deemend unnecessary and omitted to keep the core simple. Invoking any of there instructions will trigger the "unknown instruction" exception.

Non-ISA Support

Speaking of exceptions - they're all supported, as well as external interrupts. Interrupt vectors and interrupt-related behaviors follow the VL86C010 documentation. If an interrupt is raised while disabled, it get's latched and will be executed as soon as interrupts are enabled.

Memory Interface

Core's greatest advantage and it's greatest weakness. Due to expectancy of being used with block memory of an FPGA delay of exactly one clock cycle is expected between the address being put out on the bus and data appearing on the data input. This can (and will) complicate the IO access subsystems relying on timing. The core also doesn't have a "read" signal output making it difficult to create peripherals relying on clearing flags on register access.
Creation of an AXI adapter is planned for the future to fix this mess of an interface.

Reliability

It's non-existant. There's no guarantee that the core can be trusted and will not fail. It hasn't been verified, it's not certain if all the behaviors match the ISA. In the end it's just a project made by one person for fun, it can't be any good.

How do I check if it's working?

1. Go to /soft/selftests and compile the code with ARM GCC version 8. (must be version 8, ARMv2 support was dropped in later versions)
2. Go to /ARM/cpu and run make
3. Go to /ARM/cpu and run the test_all.sh script to see the cool exit codes, exit code of 1 means that the test was passed.

How do I use it in my project?

Well... You're on your own I guess. As it was said above it's a small project in a very early stage of development. A lot of stuff will change. There's no sense in using it in any project at this point.

License

A2 Hydrogen is licensed under the MIT License, allowing for both personal and commercial use with limited restrictions.