ARM-software · morgolock · Feb 4, 2026
diff --git a/filelist.json b/filelist.json
@@ -2453,26 +2453,29 @@
           ]
         }
       },
+
       "TopKV": {
-        "files": {
-          "common": [
-            "src/cpu/kernels/CpuTopKVKernel.cpp",
-            "src/cpu/operators/CpuTopKV.cpp",
-            "src/runtime/NEON/functions/NETopKV.cpp"
-          ],
-          "neon": {
-            "fp16": [ "src/cpu/kernels/topkv/generic/neon/fp16.cpp" ],
-            "fp32": [ "src/cpu/kernels/topkv/generic/neon/fp32.cpp" ],
-            "integer":["src/cpu/kernels/topkv/generic/neon/integer.cpp"],
-            "qasymm8": [
-              "src/cpu/kernels/topkv/generic/neon/qasymm8.cpp"
+          "files": {
+            "common": [
+              "src/cpu/kernels/CpuTopKVKernel.cpp",
+              "src/cpu/operators/CpuTopKV.cpp",
+              "src/runtime/NEON/functions/NETopKV.cpp"
             ],
-            "qasymm8_signed": [
-              "src/cpu/kernels/topkv/generic/neon/qasymm8_signed.cpp"
-            ]
+            "neon": {
+              "fp16": [ "src/cpu/kernels/topkv/generic/neon/fp16.cpp" ],
+              "fp32": [ "src/cpu/kernels/topkv/generic/neon/fp32.cpp" ],
+              "integer": [ "src/cpu/kernels/topkv/generic/neon/integer.cpp" ],
+              "qasymm8": [ "src/cpu/kernels/topkv/generic/neon/qasymm8.cpp" ],
+              "qasymm8_signed": [ "src/cpu/kernels/topkv/generic/neon/qasymm8_signed.cpp" ]
+            },
+            "sve": {
+              "fp32": [ "src/cpu/kernels/topkv/generic/sve/fp32.cpp" ],
+              "fp16": [ "src/cpu/kernels/topkv/generic/sve/fp16.cpp" ],
+              "integer": [ "src/cpu/kernels/topkv/generic/sve/integer.cpp" ],
+              "qasymm8": [ "src/cpu/kernels/topkv/generic/sve/qasymm8.cpp" ],
+              "qasymm8_signed": [ "src/cpu/kernels/topkv/generic/sve/qasymm8_signed.cpp" ]
+            }
           }
-
-        }
       },
       "Transpose": {
         "files": {

diff --git a/src/BUILD.bazel b/src/BUILD.bazel
@@ -395,7 +395,12 @@ filegroup(
 	"cpu/kernels/scale/sve/qasymm8.cpp",
 	"cpu/kernels/scale/sve/qasymm8_signed.cpp",
 	"cpu/kernels/softmax/generic/sve/impl.cpp",
-	"cpu/kernels/softmax/generic/sve/impl_bf16.cpp"]  +
+	"cpu/kernels/softmax/generic/sve/impl_bf16.cpp",
+	"cpu/kernels/topkv/generic/sve/fp16.cpp",
+	"cpu/kernels/topkv/generic/sve/fp32.cpp",
+	"cpu/kernels/topkv/generic/sve/integer.cpp",
+	"cpu/kernels/topkv/generic/sve/qasymm8.cpp",
+	"cpu/kernels/topkv/generic/sve/qasymm8_signed.cpp"]  +
     glob(["**/*.h",
     "**/*.hpp",
     "**/*.inl"]),

diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt
@@ -365,6 +365,11 @@ target_sources(
 	cpu/kernels/scale/sve/qasymm8_signed.cpp
 	cpu/kernels/softmax/generic/sve/impl.cpp
 	cpu/kernels/softmax/generic/sve/impl_bf16.cpp
+	cpu/kernels/topkv/generic/sve/fp16.cpp
+	cpu/kernels/topkv/generic/sve/fp32.cpp
+	cpu/kernels/topkv/generic/sve/integer.cpp
+	cpu/kernels/topkv/generic/sve/qasymm8.cpp
+	cpu/kernels/topkv/generic/sve/qasymm8_signed.cpp
 )
 
 target_sources(

diff --git a/src/cpu/kernels/CpuTopKVKernel.cpp b/src/cpu/kernels/CpuTopKVKernel.cpp
@@ -43,15 +43,42 @@ namespace
 {
 
 static const std::vector<CpuTopKVKernel::TopKVKernel> available_kernels = {
+
+    {"sve_fp16_topkv",
+     [](const CpuTopKVKernelDataTypeISASelectorData &data)
+     { return (data.dt == DataType::F16) && data.isa.fp16 && data.isa.sve; },
+     REGISTER_FP16_SVE(arm_compute::cpu::topkv_fp16_sve)},
+
+    {"sve_fp32_topkv",
+     [](const CpuTopKVKernelDataTypeISASelectorData &data) { return (data.dt == DataType::F32) && data.isa.sve; },
+     REGISTER_FP32_SVE(arm_compute::cpu::topkv_fp32_sve)},
+
+    {"sve_qasymm8_topkv",
+     [](const CpuTopKVKernelDataTypeISASelectorData &data) { return (data.dt == DataType::QASYMM8) && data.isa.sve; },
+     REGISTER_QASYMM8_SVE(arm_compute::cpu::topkv_qasymm8_sve)},
+
+    {"sve_qasymm8_signed_topkv",
+     [](const CpuTopKVKernelDataTypeISASelectorData &data)
+     { return (data.dt == DataType::QASYMM8_SIGNED) && data.isa.sve; },
+     REGISTER_QASYMM8_SIGNED_SVE(arm_compute::cpu::topkv_qasymm8_signed_sve)},
+
+    {"sve_s32_topkv",
+     [](const CpuTopKVKernelDataTypeISASelectorData &data) { return (data.dt == DataType::S32) && data.isa.sve; },
+     REGISTER_INTEGER_SVE(arm_compute::cpu::topkv_s32_sve)},
+
     {"neon_s32_topkv", [](const CpuTopKVKernelDataTypeISASelectorData &data) { return (data.dt == DataType::S32); },
      REGISTER_INTEGER_NEON(arm_compute::cpu::topkv_s32_neon)},
+
     {"neon_fp32_topkv", [](const CpuTopKVKernelDataTypeISASelectorData &data) { return (data.dt == DataType::F32); },
      REGISTER_FP32_NEON(arm_compute::cpu::topkv_fp32_neon)},
+
     {"neon_fp16_topkv",
      [](const CpuTopKVKernelDataTypeISASelectorData &data) { return (data.dt == DataType::F16) && data.isa.fp16; },
      REGISTER_FP16_NEON(arm_compute::cpu::topkv_fp16_neon)},
+
     {"neon_qu8_topkv", [](const CpuTopKVKernelDataTypeISASelectorData &data) { return (data.dt == DataType::QASYMM8); },
      REGISTER_QASYMM8_NEON(arm_compute::cpu::topkv_qasymm8_neon)},
+
     {"neon_qs8_topkv",
      [](const CpuTopKVKernelDataTypeISASelectorData &data) { return (data.dt == DataType::QASYMM8_SIGNED); },
      REGISTER_QASYMM8_SIGNED_NEON(arm_compute::cpu::topkv_qasymm8_signed_neon)}};

diff --git a/src/cpu/kernels/topkv/generic/sve/fp16.cpp b/src/cpu/kernels/topkv/generic/sve/fp16.cpp
@@ -0,0 +1,66 @@
+/*
+ * Copyright (c) 2026 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+#if defined(__ARM_FEATURE_SVE)
+
+#include "src/cpu/kernels/topkv/generic/sve/impl.h"
+
+#include <arm_sve.h>
+
+namespace arm_compute
+{
+namespace cpu
+{
+namespace detail
+{
+
+template <>
+inline uint32_t vector_length<float16_t>()
+{
+    return static_cast<uint32_t>(svcnth());
+}
+
+template <>
+inline uint32_t count_gt_block<float16_t>(const float16_t *ptr, float16_t thr, uint32_t block_elems)
+{
+    const svbool_t    pg = svwhilelt_b16(static_cast<uint64_t>(0), static_cast<uint64_t>(block_elems));
+    const svfloat16_t v  = svld1_f16(pg, ptr);
+    const svbool_t    gt = svcmpgt_n_f16(pg, v, thr);
+    return static_cast<uint32_t>(svcntp_b16(svptrue_b16(), gt));
+}
+
+} // namespace detail
+
+void topkv_fp16_sve(const ITensor *predictions, const ITensor *targets, ITensor *out, uint32_t k, const Window &win)
+{
+    detail::topkv_sve_wrapper<float16_t>(predictions, targets, out, k, win);
+}
+
+// Force instantiation into this TU
+template void
+detail::topkv_sve_wrapper<float16_t>(const ITensor *, const ITensor *, ITensor *, uint32_t, const Window &);
+
+} // namespace cpu
+} // namespace arm_compute
+
+#endif // __ARM_FEATURE_SVE
diff --git a/src/cpu/kernels/topkv/generic/sve/fp32.cpp b/src/cpu/kernels/topkv/generic/sve/fp32.cpp
@@ -0,0 +1,66 @@
+/*
+ * Copyright (c) 2026 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+#if defined(__ARM_FEATURE_SVE)
+
+#include "src/cpu/kernels/topkv/generic/sve/impl.h"
+
+#include <arm_sve.h>
+#include <cstdint>
+
+namespace arm_compute
+{
+namespace cpu
+{
+namespace detail
+{
+
+template <>
+inline uint32_t vector_length<float>()
+{
+    return static_cast<uint32_t>(svcntw());
+}
+
+template <>
+inline uint32_t count_gt_block<float>(const float *ptr, float thr, uint32_t block_elems)
+{
+    const svbool_t    pg = svwhilelt_b32(static_cast<uint64_t>(0), static_cast<uint64_t>(block_elems));
+    const svfloat32_t v  = svld1_f32(pg, ptr);
+    const svbool_t    gt = svcmpgt_n_f32(pg, v, thr);
+    return static_cast<uint32_t>(svcntp_b32(svptrue_b32(), gt));
+}
+
+} // namespace detail
+
+void topkv_fp32_sve(const ITensor *predictions, const ITensor *targets, ITensor *out, uint32_t k, const Window &win)
+{
+    detail::topkv_sve_wrapper<float>(predictions, targets, out, k, win);
+}
+
+// Force instantiation into this TU
+template void detail::topkv_sve_wrapper<float>(const ITensor *, const ITensor *, ITensor *, uint32_t, const Window &);
+
+} // namespace cpu
+} // namespace arm_compute
+
+#endif // __ARM_FEATURE_SVE
diff --git a/src/cpu/kernels/topkv/generic/sve/impl.h b/src/cpu/kernels/topkv/generic/sve/impl.h
@@ -0,0 +1,131 @@
+/*
+ * Copyright (c) 2026 Arm Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+#ifndef ACL_SRC_CPU_KERNELS_TOPKV_GENERIC_SVE_IMPL_H
+#define ACL_SRC_CPU_KERNELS_TOPKV_GENERIC_SVE_IMPL_H
+
+#include "arm_compute/core/Coordinates.h"
+#include "arm_compute/core/Error.h"
+#include "arm_compute/core/Helpers.h"
+#include "arm_compute/core/ITensor.h"
+#include "arm_compute/core/Types.h"
+#include "arm_compute/core/Window.h"
+
+#include <cstdint>
+#include <cstring>
+
+namespace arm_compute
+{
+namespace cpu
+{
+namespace detail
+{
+
+/*
+ * Type-specific hooks (declared here, defined in each cpp).
+ *
+ * - vector_length<Scalar>()
+ *     Return the SVE vector length in elements for Scalar (no clamping).
+ *
+ * - count_gt_block<Scalar>(ptr, thr, block_elems)
+ *     Count how many elements in [ptr, ptr + block_elems) are > thr.
+ *     Tail-safe via predicate. block_elems is always <= vector_length<Scalar>().
+ *
+ t contains the SVE intrinsics
+ * (e.g., qasymm8.cpp, qasymm8_signed.cpp, fp16.cpp, fp32.cpp, integer.cpp).
+ */
+
+template <typename Scalar>
+uint32_t vector_length();
+
+template <typename Scalar>
+uint32_t count_gt_block(const Scalar *ptr, Scalar thr, uint32_t block_elems);
+
+// ----------------------------------------------------------------------------
+// Generic wrapper (type-agnostic) - uses the above hooks.
+// Semantics (matching TopKV tests you showed):
+//   - predictions is N x C
+//   - window iterates across output elements (classes) => id.x() == class index c
+//   - for each class c, targets[c] gives the sample index t
+//   - scan across N samples and compute rank (#samples with value > predictions[t])
+//   - output is U8 boolean: (rank < k)
+// ----------------------------------------------------------------------------
+template <typename Scalar>
+inline void
+topkv_sve_wrapper(const ITensor *predictions, const ITensor *targets, ITensor *out, uint32_t k, const Window &window)
+{
+    ARM_COMPUTE_ERROR_ON_NULLPTR(predictions, targets, out);
+    ARM_COMPUTE_ERROR_ON(k == 0);
+
+    const ITensorInfo *pred_info = predictions->info();
+    const uint32_t     N         = pred_info->dimension(0); // samples
+    const uint32_t     C         = pred_info->dimension(1); // classes
+
+    const uint32_t vl = vector_length<Scalar>(); // cache once per kernel invocation
+
+    Iterator tgt_it(targets, window);
+    Iterator out_it(out, window);
+
+    execute_window_loop(
+        window,
+        [&](const Coordinates &id)
+        {
+            const uint32_t c = static_cast<uint32_t>(id.x()); // class index
+            ARM_COMPUTE_ERROR_ON(c >= C);
+
+            uint32_t t = {*reinterpret_cast<uint32_t *>(tgt_it.ptr())};
+            ARM_COMPUTE_ERROR_ON(t >= N);
+
+            const Scalar *col_ptr = reinterpret_cast<const Scalar *>(predictions->ptr_to_element(Coordinates(0, c)));
+            ARM_COMPUTE_ERROR_ON(col_ptr == nullptr);
+
+            const Scalar thr = col_ptr[t];
+
+            uint32_t rank = 0;
+            uint32_t idx  = 0;
+
+            while (idx < N)
+            {
+                const uint32_t remaining = N - idx;
+                const uint32_t bw        = (remaining < vl) ? remaining : vl;
+
+                rank += count_gt_block<Scalar>(col_ptr + idx, thr, bw);
+
+                if (rank >= k)
+                {
+                    break;
+                }
+
+                idx += bw;
+            }
+
+            *reinterpret_cast<uint8_t *>(out_it.ptr()) = static_cast<uint8_t>(rank < k);
+        },
+        tgt_it, out_it);
+}
+
+} // namespace detail
+} // namespace cpu
+} // namespace arm_compute
+
+#endif // ACL_SRC_CPU_KERNELS_TOPKV_GENERIC_SVE_IMPL_H