idc: Make IDC timeout value configurable

It may be beneficial to have different timeout values for fast platforms
(manufactured silicon) and at least 10 times slower FPGA platforms.

Signed-off-by: Serhiy Katsyuba <serhiy.katsyuba@intel.com>

Author: serhiy-katsyuba-intel

posix/include/rtos/idc.h

@@ -34,9 +34,6 @@
 /** \brief IDC send core power down flag. */
 #define IDC_POWER_DOWN		3
 
-/** \brief IDC send timeout in microseconds. */
-#define IDC_TIMEOUT	10000
-
 /** \brief IDC task deadline. */
 #define IDC_DEADLINE	100
 

src/Kconfig

@@ -17,6 +17,8 @@ rsource "samples/Kconfig"
 rsource "schedule/Kconfig"
 rsource "schedule/Kconfig.threads_prio"
 
+rsource "idc/Kconfig"
+
 rsource "ipc/Kconfig"
 
 rsource "math/Kconfig"

src/idc/Kconfig

@@ -0,0 +1,9 @@
+# SPDX-License-Identifier: BSD-3-Clause
+
+config IDC_TIMEOUT_US
+	int "Timeout for blocking IDC call, microseconds"
+	default 10000
+	help
+	  It may be beneficial to have different timeout values
+	  for fast platforms (manufactured silicon) and at least
+	  10 times slower FPGA platforms.

src/idc/zephyr_idc.c

@@ -165,7 +165,7 @@ int idc_send_msg(struct idc_msg *msg, uint32_t mode)
 
 	switch (mode) {
 	case IDC_BLOCKING:
-		ret = k_p4wq_wait(work, K_USEC(IDC_TIMEOUT));
+		ret = k_p4wq_wait(work, K_USEC(CONFIG_IDC_TIMEOUT_US));
 		if (!ret)
 			/* message was sent and executed successfully, get status code */
 			ret = idc_msg_status_get(msg->core);

zephyr/include/rtos/idc.h

@@ -34,9 +34,6 @@
 /** \brief IDC send core power down flag. */
 #define IDC_POWER_DOWN		3
 
-/** \brief IDC send timeout in microseconds. */
-#define IDC_TIMEOUT	10000
-
 /** \brief IDC task deadline. */
 #define IDC_DEADLINE	100