Audio: SRC: Optimize HiFi5 version code

This patch contains code optimizations in both generic C and with
Xtensa HiFi5 intrinsics

- As a fix for code the coefficients read align register is primed
  for 16 bit coefficients version. Without priming the load works
  correctly only for aligned addresses.
- The FIR filter functions are separated for stereo and any channels
  count versions. It avoids channels count check for every
  intermediate and final sample value.
- The 32 bit coefficiens version is similarly separated for stereo
  and any channels version.
- In 32 bits version the coefficients load is changed to 128 bits
  load with aligning. Data load can't be similarly enhanced due
  to frame granularity shift in data in polyphase filters matrix
  compute.
- The dual-MAC for FIR calculate is changed to quad-MAC
- The data store is changed in stereo version to 64 bit store of
  stereo frame.
- In src_polyphase_stage_cir() function the filters process loops
  are separated for stereo and for any channels count.

In a HiFi5 build sof sof-testbench4 the MCPS for stereo 32 bit
44.1 kHz to 48 kHz the performance improves from 18.37 to
16.26 MCPS.

Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>

Author: singalsu