Missing depthwise conv 16 bit xtensa kernel

[narrietal]

The depthwise convolution kernel implementation for Xtensa falls back to the reference kernel when using 16-bit activations and 8-bit weights, instead of leveraging the available optimized Xtensa implementation.

[melizabethsimmonsuk]

Bottleneck hits 8bit ++ | pipe to tensorUnit

[narrietal]

Hi @melizabethsimmonsuk, I do not understand your comment. Could you be more specific?

[github-actions]

This issue is being marked as stale due to inactivity. Remove the stale label or comment to prevent closure in 5 days.

[narrietal]

This is still active.