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lines changed Original file line number Diff line number Diff line change @@ -12,9 +12,13 @@ How to compile it:
1212``` shell
1313$ gcc -O3 -Wall -lelf emu-rv32i.c -o emu-rv32i
1414```
15+ or
16+ ``` shell
17+ $ make emu-rv32i
18+ ```
1519
16- Run RV32I compliance tests.
17- Assume ` emu-rv32i ` in ` $PATH ` environment variable.
20+ Passed RV32I compliance tests from https://github.com/riscv/riscv-compliance
21+ - Must install the [ risc-v toolchain ] ( https://xpack.github.io/riscv-none-embed-gcc/ )
1822``` shell
1923$ git clone https://github.com/riscv/riscv-compliance
2024$ cd riscv-compliance
@@ -23,12 +27,7 @@ $ make RISCV_PREFIX=riscv-none-embed- RISCV_DEVICE=rv32i TARGET_SIM=emu-rv32i va
2327
2428Compiling and running simple code:
2529``` shell
26- $ riscv32-unknown-elf-gcc -O3 -nostdlib test1.c -o test1
27- ```
28-
29- or
30- ``` shell
31- $ riscv64-unknown-elf-gcc -march=rv32i -mabi=ilp32 -O3 -nostdlib test1.c -o test1
30+ $ make test1
3231```
3332
3433then
@@ -37,6 +36,13 @@ $ ./emu-rv32i test1
3736Hello RISC-V!
3837```
3938
39+ Passed RV32C compliance tests from https://github.com/riscv/riscv-compliance
40+ ``shell
41+ make C-ADDI.log
42+ ```
43+ If there is no accident, it will output the `TEST PASSED`
44+
45+
4046RV32M and RV32A instructions may be enabled by commenting `#define STRICT_RV32I`.
4147
4248## How to build RISC-V toolchain from scratch
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