Still a fix for clang bad format

Author: Daniel Rossier

so3/arch/arm64/rpi4_64/include/mach/ipamap.h

@@ -21,9 +21,8 @@
 
 #include <asm/mmu.h>
 
-ipamap_t agency_ipamap[] = 
-{
-	
+ipamap_t agency_ipamap[] = {
+
 	/* I/O Memory space*/
 	{
 		.ipa_addr = 0xf0000000,

so3/devices/irq/gic.c

@@ -106,7 +106,8 @@ void display_lr(unsigned int n)
 
 	printk("LR state: \n");
 	printk("  - virq: %x\n", lr & GICH_LR_VIRT_ID_MASK);
-	printk("  - prio: %x\n", (lr >> GICH_LR_PRIORITY_SHIFT) & GICH_LR_PRIORITY_MASK);
+	printk("  - prio: %x\n",
+	       (lr >> GICH_LR_PRIORITY_SHIFT) & GICH_LR_PRIORITY_MASK);
 	printk("  - pending: %x\n", lr & GICH_LR_PENDING_BIT);
 	printk("  - active: %x\n", lr & GICH_LR_ACTIVE_BIT);
 	printk("  - hw: %x\n", lr & GICH_LR_HW_BIT);
@@ -127,7 +128,8 @@ void fdt_interrupt_node(int fdt_offset, irq_def_t *irq_def)
 	const fdt32_t *p;
 
 	/* Interrupts - as described in the bindings - have 3 specific cells */
-	prop = fdt_get_property(__fdt_addr, fdt_offset, "interrupts", &prop_len);
+	prop = fdt_get_property(__fdt_addr, fdt_offset, "interrupts",
+				&prop_len);
 	BUG_ON(!prop);
 
 	p = (const fdt32_t *) prop->data;
@@ -141,9 +143,11 @@ void fdt_interrupt_node(int fdt_offset, irq_def_t *irq_def)
 		/* Not all combinations are currently handled. */
 
 		if (irq_def->irq_class != GIC_IRQ_TYPE_SGI)
-			irq_def->irqnr += 16; /* Possibly for a Private Peripheral Interrupt (PPI) */
+			irq_def->irqnr +=
+				16; /* Possibly for a Private Peripheral Interrupt (PPI) */
 
-		if (irq_def->irq_class == GIC_IRQ_TYPE_SPI) /* It is a Shared Peripheral Interrupt (SPI) */
+		if (irq_def->irq_class ==
+		    GIC_IRQ_TYPE_SPI) /* It is a Shared Peripheral Interrupt (SPI) */
 			irq_def->irqnr += 16;
 
 	} else {
@@ -514,7 +518,8 @@ static void gic_handle(void *data)
 
 		if (irq_nr < 16) {
 #ifdef CONFIG_AVZ
-			if ((smp_processor_id() == ME_CPU) && current_domain->avz_shared->evtchn_upcall_pending)
+			if ((smp_processor_id() == ME_CPU) &&
+			    current_domain->avz_shared->evtchn_upcall_pending)
 				gic_set_pending(irq_nr);
 
 #else
@@ -603,7 +608,9 @@ void gic_hw_reset(void)
 	/* Distributor interface initialization */
 
 	/* Disable distributor */
-	iowrite32(&gic->gicd->ctlr, ioread32(((void *) &gic->gicd->ctlr) + INTC_CPU_CTRL_REG0) & ~INTC_DISABLE);
+	iowrite32(&gic->gicd->ctlr,
+		  ioread32(((void *) &gic->gicd->ctlr) + INTC_CPU_CTRL_REG0) &
+			  ~INTC_DISABLE);
 
 	/* All interrupts level triggered, active high by default */
 	for (n = 32; n < NR_IRQS; n++)
@@ -658,8 +665,7 @@ static int gic_init(dev_t *dev, int fdt_offset)
 	int prop_len;
 	int cpu;
 
-	for (cpu = 0; cpu < CONFIG_NR_CPUS; cpu++) 
-	{
+	for (cpu = 0; cpu < CONFIG_NR_CPUS; cpu++) {
 		spin_lock_init(&per_cpu(intc_lock, cpu));
 	}
 
@@ -679,33 +685,42 @@ static int gic_init(dev_t *dev, int fdt_offset)
 
 	/* Mapping the two mem area of GIC (distributor & CPU interface) */
 #ifdef CONFIG_ARCH_ARM32
-	gic->gicd = (struct gicd_regs *) io_map(fdt32_to_cpu(((const fdt32_t *) prop->data)[0]),
-						fdt32_to_cpu(((const fdt32_t *) prop->data)[1]));
-	gic->gicd_paddr = (void *) fdt32_to_cpu(((const fdt32_t *) prop->data)[0]);
-
-	gic->gicc = (struct gicc_regs *) io_map(fdt32_to_cpu(((const fdt32_t *) prop->data)[2]),
-						fdt32_to_cpu(((const fdt32_t *) prop->data)[3]));
+	gic->gicd = (struct gicd_regs *) io_map(
+		fdt32_to_cpu(((const fdt32_t *) prop->data)[0]),
+		fdt32_to_cpu(((const fdt32_t *) prop->data)[1]));
+	gic->gicd_paddr =
+		(void *) fdt32_to_cpu(((const fdt32_t *) prop->data)[0]);
+
+	gic->gicc = (struct gicc_regs *) io_map(
+		fdt32_to_cpu(((const fdt32_t *) prop->data)[2]),
+		fdt32_to_cpu(((const fdt32_t *) prop->data)[3]));
 #else
-	gic->gicd = (struct gicd_regs *) io_map(fdt64_to_cpu(((const fdt64_t *) prop->data)[0]),
-						fdt64_to_cpu(((const fdt64_t *) prop->data)[1]));
-	gic->gicd_paddr = (void *) fdt64_to_cpu(((const fdt64_t *) prop->data)[0]);
-
-	gic->gicc = (struct gicc_regs *) io_map(fdt64_to_cpu(((const fdt64_t *) prop->data)[2]),
-						fdt64_to_cpu(((const fdt64_t *) prop->data)[3]));
+	gic->gicd = (struct gicd_regs *) io_map(
+		fdt64_to_cpu(((const fdt64_t *) prop->data)[0]),
+		fdt64_to_cpu(((const fdt64_t *) prop->data)[1]));
+	gic->gicd_paddr =
+		(void *) fdt64_to_cpu(((const fdt64_t *) prop->data)[0]);
+
+	gic->gicc = (struct gicc_regs *) io_map(
+		fdt64_to_cpu(((const fdt64_t *) prop->data)[2]),
+		fdt64_to_cpu(((const fdt64_t *) prop->data)[3]));
 #endif
 
 #ifdef CONFIG_AVZ
 
-	gic->gich = (struct gich_regs *) io_map(fdt64_to_cpu(((const fdt64_t *) prop->data)[4]),
-						fdt64_to_cpu(((const fdt64_t *) prop->data)[5]));
+	gic->gich = (struct gich_regs *) io_map(
+		fdt64_to_cpu(((const fdt64_t *) prop->data)[4]),
+		fdt64_to_cpu(((const fdt64_t *) prop->data)[5]));
 
 	spin_lock_init(&pending_irqs.lock);
 
 	/* Disable PPIs, except for the maintenance interrupt. */
-	iowrite32(&gic->gicd->isenabler, 0xffff0000 & ~(1 << IRQ_ARCH_ARM_MAINT));
+	iowrite32(&gic->gicd->isenabler,
+		  0xffff0000 & ~(1 << IRQ_ARCH_ARM_MAINT));
 
 	/* Ensure all IPIs and the maintenance PPI are enabled */
-	iowrite32(&gic->gicd->isenabler, 0x0000ffff & ~(1 << IRQ_ARCH_ARM_MAINT));
+	iowrite32(&gic->gicd->isenabler,
+		  0x0000ffff & ~(1 << IRQ_ARCH_ARM_MAINT));
 
 #endif