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2 parents 4f0c846 + fd52819 commit 6baaf6aCopy full SHA for 6baaf6a
2 files changed
cortex-m/src/peripheral/dwt.rs
@@ -64,10 +64,15 @@ pub struct Comparator {
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// DWT CTRL register fields
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const NUMCOMP_OFFSET: u32 = 28;
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+#[cfg(not(armv6m))]
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const NOTRCPKT: u32 = 1 << 27;
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const NOEXTTRIG: u32 = 1 << 26;
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const NOCYCCNT: u32 = 1 << 25;
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const NOPRFCNT: u32 = 1 << 24;
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const CYCCNTENA: u32 = 1 << 0;
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impl DWT {
cortex-m/src/peripheral/scb.rs
@@ -5,6 +5,7 @@ use core::arch::asm;
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use core::ptr;
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#[cfg(any(armv7m, armv8m))]
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use core::sync::atomic::{Ordering, compiler_fence};
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use cortex_m_macros::asm_cfg;
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use volatile_register::RW;
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