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Description
The test plan:
- System under Test (SUT) is EVC- Software
- describes in detail the borders of the system under test
- detailing the description on every interface:
- SCADE model (EVC part is part of SUT)
- Non SCADE C- Code
- C- Wrapper (Proposal: parts used by all integraters is part of the SUT - adding separate components like the ability to send/ receive bit coded data stream)
- Bitwalker (part of the SUT)
- detailing the description on every interface:
- is part of the VnV plan @HardiHungar
- contains the objectives of testing
- testing strategy (result in coverage expected)
Is identified to contain the:
- pure software test
- workflow description of testing
- test environments (incl. testing tools)
- the coverage criteria (coverage goal)
- different criterias applicable on the different model level:
- data flow
- state machine
- c- code
- MCDC coverage ?
- ...
- different criterias applicable on the different model level:
- pass/ fail criteria
- on module level:
- is it the expected nominal bahaviour
- what is the reference for non- expected behaviour
- on system level
- is it the expected behaviour within due time (seconds or mili seconds)
- on module level:
Is identified to be performed on:
- module level
- functionalities provided within the EVC software
- list of features to be tested (ADD document)
- stubs
- functionalities provided within the EVC software
- subsystem level
- SCADE generated EVC software
- Bitwalker
- system level (on EVC API level)
- model interface to trackside
- RBC
- Balise
- model interface to train
- TIU
- model interface to DMI
- DMI graphic (HMI)
- DMI behaviour
- environmental requirements (list of specificatoins + relevant requirements for EVC testing)
- DMI
- RBC
- Balise
- TIU
- STM
- qualification of testing environment
- air gap @MarcBehrens
- rbc on SCADE model level @apinnau
- DMI
- test deliverables/ tasks