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[RISCV] Add BFloat16 to mangleRISCVFixedRVVVectorType. (#172095)
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2 files changed

+57
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‎clang/lib/AST/ItaniumMangle.cpp‎

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -4204,6 +4204,9 @@ void CXXNameMangler::mangleRISCVFixedRVVVectorType(const VectorType *T) {
42044204
case BuiltinType::Double:
42054205
TypeNameOS << "float64";
42064206
break;
4207+
case BuiltinType::BFloat16:
4208+
TypeNameOS << "bfloat16";
4209+
break;
42074210
default:
42084211
llvm_unreachable("unexpected element type for fixed-length RVV vector!");
42094212
}

‎clang/test/CodeGenCXX/riscv-mangle-rvv-fixed-vectors.cpp‎

Lines changed: 54 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -27,6 +27,7 @@ typedef __rvv_uint8mf4_t vuint8mf4_t;
2727
typedef __rvv_int16mf4_t vint16mf4_t;
2828
typedef __rvv_uint16mf4_t vuint16mf4_t;
2929
typedef __rvv_float16mf4_t vfloat16mf4_t;
30+
typedef __rvv_bfloat16mf4_t vbfloat16mf4_t;
3031

3132
typedef __rvv_int8mf2_t vint8mf2_t;
3233
typedef __rvv_uint8mf2_t vuint8mf2_t;
@@ -36,6 +37,7 @@ typedef __rvv_int32mf2_t vint32mf2_t;
3637
typedef __rvv_uint32mf2_t vuint32mf2_t;
3738
typedef __rvv_float16mf2_t vfloat16mf2_t;
3839
typedef __rvv_float32mf2_t vfloat32mf2_t;
40+
typedef __rvv_bfloat16mf2_t vbfloat16mf2_t;
3941

4042
typedef __rvv_int8m1_t vint8m1_t;
4143
typedef __rvv_uint8m1_t vuint8m1_t;
@@ -48,6 +50,7 @@ typedef __rvv_uint64m1_t vuint64m1_t;
4850
typedef __rvv_float16m1_t vfloat16m1_t;
4951
typedef __rvv_float32m1_t vfloat32m1_t;
5052
typedef __rvv_float64m1_t vfloat64m1_t;
53+
typedef __rvv_bfloat16m1_t vbfloat16m1_t;
5154

5255
typedef __rvv_int8m2_t vint8m2_t;
5356
typedef __rvv_uint8m2_t vuint8m2_t;
@@ -60,6 +63,7 @@ typedef __rvv_uint64m2_t vuint64m2_t;
6063
typedef __rvv_float16m2_t vfloat16m2_t;
6164
typedef __rvv_float32m2_t vfloat32m2_t;
6265
typedef __rvv_float64m2_t vfloat64m2_t;
66+
typedef __rvv_bfloat16m2_t vbfloat16m2_t;
6367

6468
typedef __rvv_int8m4_t vint8m4_t;
6569
typedef __rvv_uint8m4_t vuint8m4_t;
@@ -72,6 +76,7 @@ typedef __rvv_uint64m4_t vuint64m4_t;
7276
typedef __rvv_float16m4_t vfloat16m4_t;
7377
typedef __rvv_float32m4_t vfloat32m4_t;
7478
typedef __rvv_float64m4_t vfloat64m4_t;
79+
typedef __rvv_bfloat16m4_t vbfloat16m4_t;
7580

7681
typedef __rvv_int8m8_t vint8m8_t;
7782
typedef __rvv_uint8m8_t vuint8m8_t;
@@ -84,6 +89,7 @@ typedef __rvv_uint64m8_t vuint64m8_t;
8489
typedef __rvv_float16m8_t vfloat16m8_t;
8590
typedef __rvv_float32m8_t vfloat32m8_t;
8691
typedef __rvv_float64m8_t vfloat64m8_t;
92+
typedef __rvv_bfloat16m8_t vbfloat16m8_t;
8793

8894
typedef __rvv_bool1_t vbool1_t;
8995
typedef __rvv_bool2_t vbool2_t;
@@ -104,6 +110,7 @@ typedef vuint8mf4_t fixed_uint8mf4_t __attribute__((riscv_rvv_vector_bits(__risc
104110
typedef vuint16mf4_t fixed_uint16mf4_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen/4)));
105111

106112
typedef vfloat16mf4_t fixed_float16mf4_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen/4)));
113+
typedef vbfloat16mf4_t fixed_bfloat16mf4_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen/4)));
107114

108115
typedef vint8mf2_t fixed_int8mf2_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen/2)));
109116
typedef vint16mf2_t fixed_int16mf2_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen/2)));
@@ -115,6 +122,7 @@ typedef vuint32mf2_t fixed_uint32mf2_t __attribute__((riscv_rvv_vector_bits(__ri
115122

116123
typedef vfloat16mf2_t fixed_float16mf2_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen/2)));
117124
typedef vfloat32mf2_t fixed_float32mf2_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen/2)));
125+
typedef vbfloat16mf2_t fixed_bfloat16mf2_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen/2)));
118126

119127
typedef vint8m1_t fixed_int8m1_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen)));
120128
typedef vint16m1_t fixed_int16m1_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen)));
@@ -129,6 +137,7 @@ typedef vuint64m1_t fixed_uint64m1_t __attribute__((riscv_rvv_vector_bits(__risc
129137
typedef vfloat16m1_t fixed_float16m1_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen)));
130138
typedef vfloat32m1_t fixed_float32m1_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen)));
131139
typedef vfloat64m1_t fixed_float64m1_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen)));
140+
typedef vbfloat16m1_t fixed_bfloat16m1_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen)));
132141

133142
typedef vint8m2_t fixed_int8m2_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen*2)));
134143
typedef vint16m2_t fixed_int16m2_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen*2)));
@@ -143,6 +152,7 @@ typedef vuint64m2_t fixed_uint64m2_t __attribute__((riscv_rvv_vector_bits(__risc
143152
typedef vfloat16m2_t fixed_float16m2_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen*2)));
144153
typedef vfloat32m2_t fixed_float32m2_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen*2)));
145154
typedef vfloat64m2_t fixed_float64m2_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen*2)));
155+
typedef vbfloat16m2_t fixed_bfloat16m2_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen*2)));
146156

147157
typedef vint8m4_t fixed_int8m4_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen*4)));
148158
typedef vint16m4_t fixed_int16m4_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen*4)));
@@ -157,6 +167,7 @@ typedef vuint64m4_t fixed_uint64m4_t __attribute__((riscv_rvv_vector_bits(__risc
157167
typedef vfloat16m4_t fixed_float16m4_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen*4)));
158168
typedef vfloat32m4_t fixed_float32m4_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen*4)));
159169
typedef vfloat64m4_t fixed_float64m4_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen*4)));
170+
typedef vbfloat16m4_t fixed_bfloat16m4_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen*4)));
160171

161172
typedef vint8m8_t fixed_int8m8_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen*8)));
162173
typedef vint16m8_t fixed_int16m8_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen*8)));
@@ -171,6 +182,7 @@ typedef vuint64m8_t fixed_uint64m8_t __attribute__((riscv_rvv_vector_bits(__risc
171182
typedef vfloat16m8_t fixed_float16m8_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen*8)));
172183
typedef vfloat32m8_t fixed_float32m8_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen*8)));
173184
typedef vfloat64m8_t fixed_float64m8_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen*8)));
185+
typedef vbfloat16m8_t fixed_bfloat16m8_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen*8)));
174186

175187
typedef vbool1_t fixed_bool1_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen)));
176188
typedef vbool2_t fixed_bool2_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen/2)));
@@ -259,6 +271,13 @@ void f10(S<fixed_float64m1_t>) {}
259271
// CHECK-1024: _Z3f111SI9__RVV_VLSIu17__rvv_float16m1_tLj1024EEE
260272
void f11(S<fixed_float16m1_t>) {}
261273

274+
// CHECK-64: _Z3f121SI9__RVV_VLSIu18__rvv_bfloat16m1_tLj64EEE
275+
// CHECK-128: _Z3f121SI9__RVV_VLSIu18__rvv_bfloat16m1_tLj128EEE
276+
// CHECK-256: _Z3f121SI9__RVV_VLSIu18__rvv_bfloat16m1_tLj256EEE
277+
// CHECK-512: _Z3f121SI9__RVV_VLSIu18__rvv_bfloat16m1_tLj512EEE
278+
// CHECK-1024: _Z3f121SI9__RVV_VLSIu18__rvv_bfloat16m1_tLj1024EEE
279+
void f12(S<fixed_bfloat16m1_t>) {}
280+
262281
// CHECK-64: _Z4m2f11SI9__RVV_VLSIu14__rvv_int8m2_tLj128EEE
263282
// CHECK-128: _Z4m2f11SI9__RVV_VLSIu14__rvv_int8m2_tLj256EEE
264283
// CHECK-256: _Z4m2f11SI9__RVV_VLSIu14__rvv_int8m2_tLj512EEE
@@ -336,6 +355,13 @@ void m2f10(S<fixed_float64m2_t>) {}
336355
// CHECK-1024: _Z5m2f111SI9__RVV_VLSIu17__rvv_float16m2_tLj2048EEE
337356
void m2f11(S<fixed_float16m2_t>) {}
338357

358+
// CHECK-64: _Z5m2f121SI9__RVV_VLSIu18__rvv_bfloat16m2_tLj128EEE
359+
// CHECK-128: _Z5m2f121SI9__RVV_VLSIu18__rvv_bfloat16m2_tLj256EEE
360+
// CHECK-256: _Z5m2f121SI9__RVV_VLSIu18__rvv_bfloat16m2_tLj512EEE
361+
// CHECK-512: _Z5m2f121SI9__RVV_VLSIu18__rvv_bfloat16m2_tLj1024EEE
362+
// CHECK-1024: _Z5m2f121SI9__RVV_VLSIu18__rvv_bfloat16m2_tLj2048EEE
363+
void m2f12(S<fixed_bfloat16m2_t>) {}
364+
339365
// CHECK-64: _Z4m4f11SI9__RVV_VLSIu14__rvv_int8m4_tLj256EEE
340366
// CHECK-128: _Z4m4f11SI9__RVV_VLSIu14__rvv_int8m4_tLj512EEE
341367
// CHECK-256: _Z4m4f11SI9__RVV_VLSIu14__rvv_int8m4_tLj1024EEE
@@ -413,6 +439,13 @@ void m4f10(S<fixed_float64m4_t>) {}
413439
// CHECK-1024: _Z5m4f111SI9__RVV_VLSIu17__rvv_float16m4_tLj4096EEE
414440
void m4f11(S<fixed_float16m4_t>) {}
415441

442+
// CHECK-64: _Z5m4f121SI9__RVV_VLSIu18__rvv_bfloat16m4_tLj256EEE
443+
// CHECK-128: _Z5m4f121SI9__RVV_VLSIu18__rvv_bfloat16m4_tLj512EEE
444+
// CHECK-256: _Z5m4f121SI9__RVV_VLSIu18__rvv_bfloat16m4_tLj1024EEE
445+
// CHECK-512: _Z5m4f121SI9__RVV_VLSIu18__rvv_bfloat16m4_tLj2048EEE
446+
// CHECK-1024: _Z5m4f121SI9__RVV_VLSIu18__rvv_bfloat16m4_tLj4096EEE
447+
void m4f12(S<fixed_bfloat16m4_t>) {}
448+
416449
// CHECK-64: _Z4m8f11SI9__RVV_VLSIu14__rvv_int8m8_tLj512EEE
417450
// CHECK-128: _Z4m8f11SI9__RVV_VLSIu14__rvv_int8m8_tLj1024EEE
418451
// CHECK-256: _Z4m8f11SI9__RVV_VLSIu14__rvv_int8m8_tLj2048EEE
@@ -490,6 +523,13 @@ void m8f10(S<fixed_float64m8_t>) {}
490523
// CHECK-1024: _Z5m8f111SI9__RVV_VLSIu17__rvv_float16m8_tLj8192EEE
491524
void m8f11(S<fixed_float16m8_t>) {}
492525

526+
// CHECK-64: _Z5m8f121SI9__RVV_VLSIu18__rvv_bfloat16m8_tLj512EEE
527+
// CHECK-128: _Z5m8f121SI9__RVV_VLSIu18__rvv_bfloat16m8_tLj1024EEE
528+
// CHECK-256: _Z5m8f121SI9__RVV_VLSIu18__rvv_bfloat16m8_tLj2048EEE
529+
// CHECK-512: _Z5m8f121SI9__RVV_VLSIu18__rvv_bfloat16m8_tLj4096EEE
530+
// CHECK-1024: _Z5m8f121SI9__RVV_VLSIu18__rvv_bfloat16m8_tLj8192EEE
531+
void m8f12(S<fixed_bfloat16m8_t>) {}
532+
493533
// CHECK-64: _Z5mf2f11SI9__RVV_VLSIu15__rvv_int8mf2_tLj32EEE
494534
// CHECK-128: _Z5mf2f11SI9__RVV_VLSIu15__rvv_int8mf2_tLj64EEE
495535
// CHECK-256: _Z5mf2f11SI9__RVV_VLSIu15__rvv_int8mf2_tLj128EEE
@@ -546,6 +586,13 @@ void mf2f9(S<fixed_float32mf2_t>) {}
546586
// CHECK-1024: _Z6mf2f101SI9__RVV_VLSIu18__rvv_float16mf2_tLj512EEE
547587
void mf2f10(S<fixed_float16mf2_t>) {}
548588

589+
// CHECK-64: _Z6mf2f111SI9__RVV_VLSIu19__rvv_bfloat16mf2_tLj32EEE
590+
// CHECK-128: _Z6mf2f111SI9__RVV_VLSIu19__rvv_bfloat16mf2_tLj64EEE
591+
// CHECK-256: _Z6mf2f111SI9__RVV_VLSIu19__rvv_bfloat16mf2_tLj128EEE
592+
// CHECK-512: _Z6mf2f111SI9__RVV_VLSIu19__rvv_bfloat16mf2_tLj256EEE
593+
// CHECK-1024: _Z6mf2f111SI9__RVV_VLSIu19__rvv_bfloat16mf2_tLj512EEE
594+
void mf2f11(S<fixed_bfloat16mf2_t>) {}
595+
549596
// CHECK-64: _Z5mf4f11SI9__RVV_VLSIu15__rvv_int8mf4_tLj16EEE
550597
// CHECK-128: _Z5mf4f11SI9__RVV_VLSIu15__rvv_int8mf4_tLj32EEE
551598
// CHECK-256: _Z5mf4f11SI9__RVV_VLSIu15__rvv_int8mf4_tLj64EEE
@@ -581,6 +628,13 @@ void mf4f6(S<fixed_uint16mf4_t>) {}
581628
// CHECK-1024: _Z5mf4f71SI9__RVV_VLSIu18__rvv_float16mf4_tLj256EEE
582629
void mf4f7(S<fixed_float16mf4_t>) {}
583630

631+
// CHECK-64: _Z5mf4f81SI9__RVV_VLSIu19__rvv_bfloat16mf4_tLj16EEE
632+
// CHECK-128: _Z5mf4f81SI9__RVV_VLSIu19__rvv_bfloat16mf4_tLj32EEE
633+
// CHECK-256: _Z5mf4f81SI9__RVV_VLSIu19__rvv_bfloat16mf4_tLj64EEE
634+
// CHECK-512: _Z5mf4f81SI9__RVV_VLSIu19__rvv_bfloat16mf4_tLj128EEE
635+
// CHECK-1024: _Z5mf4f81SI9__RVV_VLSIu19__rvv_bfloat16mf4_tLj256EEE
636+
void mf4f8(S<fixed_bfloat16mf4_t>) {}
637+
584638
// CHECK-64: _Z5mf8f11SI9__RVV_VLSIu15__rvv_int8mf8_tLj8EEE
585639
// CHECK-128: _Z5mf8f11SI9__RVV_VLSIu15__rvv_int8mf8_tLj16EEE
586640
// CHECK-256: _Z5mf8f11SI9__RVV_VLSIu15__rvv_int8mf8_tLj32EEE

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