@@ -1106,12 +1106,9 @@ module RangeStage<
11061106 b = bRight and origdelta = odRight and reason = rRight and bLeft instanceof SemZeroBound
11071107 )
11081108 or
1109- exists (
1110- D:: Delta dLeft , D:: Delta dRight , boolean fbeLeft , boolean fbeRight , D:: Delta odLeft ,
1111- D:: Delta odRight , SemReason rLeft , SemReason rRight
1112- |
1113- boundedSubOperandLeft ( e , upper , b , dLeft , fbeLeft , odLeft , rLeft ) and
1114- boundedSubOperandRight ( e , upper , dRight , fbeRight , odRight , rRight ) and
1109+ exists ( D:: Delta dLeft , D:: Delta dRight , boolean fbeLeft , boolean fbeRight |
1110+ boundedSubOperandLeft ( e , upper , b , dLeft , fbeLeft , origdelta , reason ) and
1111+ boundedSubOperandRight ( e , upper , dRight , fbeRight , _, _) and
11151112 // when `upper` is `true` we have:
11161113 // left <= b + dLeft
11171114 // right >= 0 + dRight
@@ -1124,10 +1121,6 @@ module RangeStage<
11241121 // = b + (dLeft - dRight)
11251122 delta = D:: fromFloat ( D:: toFloat ( dLeft ) - D:: toFloat ( dRight ) ) and
11261123 fromBackEdge = fbeLeft .booleanOr ( fbeRight )
1127- |
1128- origdelta = odLeft and reason = rLeft
1129- or
1130- origdelta = odRight and reason = rRight
11311124 )
11321125 or
11331126 exists (
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