From c984158ef5f24fff0a17546b3184dc2fd05a7779 Mon Sep 17 00:00:00 2001 From: Stefan Wick Date: Thu, 13 Feb 2025 15:48:43 -0800 Subject: [PATCH 1/2] adding STM32 driver files --- common/stm32/fx_stm32_levelx_nand_driver.c | 313 +++++++++++++ common/stm32/fx_stm32_levelx_nor_driver.c | 414 ++++++++++++++++++ common/stm32/fx_stm32_mmc_driver.c | 412 +++++++++++++++++ common/stm32/fx_stm32_sd_driver.c | 411 +++++++++++++++++ common/stm32/fx_stm32_sram_driver.c | 168 +++++++ .../template/fx_stm32_levelx_nand_driver.h | 115 +++++ .../template/fx_stm32_levelx_nor_driver.h | 143 ++++++ common/stm32/template/fx_stm32_mmc_driver.h | 139 ++++++ .../stm32/template/fx_stm32_mmc_driver_glue.c | 96 ++++ common/stm32/template/fx_stm32_sd_driver.h | 144 ++++++ .../template/fx_stm32_sd_driver_dma_rtos.h | 205 +++++++++ .../fx_stm32_sd_driver_dma_standalone.h | 197 +++++++++ .../stm32/template/fx_stm32_sd_driver_glue.c | 95 ++++ .../fx_stm32_sd_driver_glue_dma_rtos.c | 193 ++++++++ .../fx_stm32_sd_driver_glue_dma_standalone.c | 196 +++++++++ common/stm32/template/fx_stm32_sram_driver.h | 71 +++ 16 files changed, 3312 insertions(+) create mode 100644 common/stm32/fx_stm32_levelx_nand_driver.c create mode 100644 common/stm32/fx_stm32_levelx_nor_driver.c create mode 100644 common/stm32/fx_stm32_mmc_driver.c create mode 100644 common/stm32/fx_stm32_sd_driver.c create mode 100644 common/stm32/fx_stm32_sram_driver.c create mode 100644 common/stm32/template/fx_stm32_levelx_nand_driver.h create mode 100644 common/stm32/template/fx_stm32_levelx_nor_driver.h create mode 100644 common/stm32/template/fx_stm32_mmc_driver.h create mode 100644 common/stm32/template/fx_stm32_mmc_driver_glue.c create mode 100644 common/stm32/template/fx_stm32_sd_driver.h create mode 100644 common/stm32/template/fx_stm32_sd_driver_dma_rtos.h create mode 100644 common/stm32/template/fx_stm32_sd_driver_dma_standalone.h create mode 100644 common/stm32/template/fx_stm32_sd_driver_glue.c create mode 100644 common/stm32/template/fx_stm32_sd_driver_glue_dma_rtos.c create mode 100644 common/stm32/template/fx_stm32_sd_driver_glue_dma_standalone.c create mode 100644 common/stm32/template/fx_stm32_sram_driver.h diff --git a/common/stm32/fx_stm32_levelx_nand_driver.c b/common/stm32/fx_stm32_levelx_nand_driver.c new file mode 100644 index 0000000..bc14c51 --- /dev/null +++ b/common/stm32/fx_stm32_levelx_nand_driver.c @@ -0,0 +1,313 @@ +/**************************************************************************/ +/* */ +/* Copyright (c) Microsoft Corporation. All rights reserved. */ +/* */ +/* This software is licensed under the Microsoft Software License */ +/* Terms for Microsoft Azure RTOS. Full text of the license can be */ +/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ +/* and in the root directory of this software. */ +/* */ +/**************************************************************************/ + +#include "fx_stm32_levelx_nand_driver.h" + +/* define the struct used to identify the levelx driver to instantiate */ +struct fx_lx_nand_driver_instance +{ + LX_NAND_FLASH flash_instance; + CHAR name[32]; + UINT id; + UINT (*nand_driver_initialize)(LX_NAND_FLASH *); + UINT initialized; +}; + +static struct fx_lx_nand_driver_instance fx_lx_nand_drivers[MAX_LX_NAND_DRIVERS] = +{ +#ifdef LX_NAND_SIMULATOR_DRIVER + { .name = LX_NAND_SIMULATOR_DRIVER_NAME, .id = LX_NAND_SIMULATOR_DRIVER_ID, .nand_driver_initialize = lx_stm32_nand_simulator_initialize}, +#endif + +#ifdef LX_NAND_CUSTOM_DRIVER + LX_NAND_CUSTOM_DRIVERS +#endif +}; + +static struct fx_lx_nand_driver_instance *current_driver = NULL; + +ULONG fx_lx_nand_driver_buffer[(7 * TOTAL_BLOCKS + 4 + 2 * (BYTES_PER_PHYSICAL_PAGE + SPARE_BYTES_PER_PAGE)) / sizeof(ULONG)]; + +/* Exported constants --------------------------------------------------------*/ +static const ULONG num_drivers = sizeof(fx_lx_nand_drivers)/sizeof(fx_lx_nand_drivers[0]); + +/* Exported functions ------------------------------------------------------- */ + +static UINT find_driver_id(UINT driver_id) +{ + UINT i = 0; + + for (i = 0; i < num_drivers; i++) + { + if (fx_lx_nand_drivers[i].id == driver_id) + return i; + } + + return UNKNOWN_DRIVER_ID; +} + +VOID fx_stm32_levelx_nand_driver(FX_MEDIA *media_ptr) +{ + ULONG i; + UINT status; + UCHAR *source_buffer; + UCHAR *destination_buffer; + ULONG logical_sector; + + + /* Process the driver request specified in the media control block.*/ +#ifdef USE_LX_NAND_DEFAULT_DRIVER + i = find_driver_id(NAND_DEFAULT_DRIVER); +#else + if (media_ptr->fx_media_driver_info == NULL) + { + i = UNKNOWN_DRIVER_ID; + } + else + { + i = find_driver_id((UINT)media_ptr->fx_media_driver_info); + } + +#endif + + if (i == UNKNOWN_DRIVER_ID) + { + /* No Driver found return an error */ + media_ptr->fx_media_driver_status = FX_MEDIA_INVALID; + return; + } + else + { + current_driver = &fx_lx_nand_drivers[i]; + } + + switch(media_ptr->fx_media_driver_request) + { + + case FX_DRIVER_INIT: + { + if (current_driver->initialized == FX_FALSE) + { +#ifdef FX_NAND_FORMAT_FLASH_BEFORE_OPEN + /* Format flash instance*/ + status = lx_nand_flash_format(¤t_driver->flash_instance, current_driver->name, current_driver->nand_driver_initialize, fx_lx_nand_driver_buffer, sizeof(fx_lx_nand_driver_buffer)); + if (status != LX_SUCCESS) + { + media_ptr->fx_media_driver_status = FX_IO_ERROR; + + return; + } +#endif + /* Open flash instance*/ + status = lx_nand_flash_open(¤t_driver->flash_instance, current_driver->name, current_driver->nand_driver_initialize, fx_lx_nand_driver_buffer, sizeof(fx_lx_nand_driver_buffer)); + + /* LevelX driver correctly initialized */ + if (status == LX_SUCCESS) + { + current_driver->initialized = FX_TRUE; + media_ptr->fx_media_driver_status = FX_SUCCESS; + + media_ptr->fx_media_driver_free_sector_update = FX_TRUE; + } + else + { + media_ptr->fx_media_driver_status = FX_IO_ERROR; + } + } + else + { + media_ptr->fx_media_driver_status = FX_SUCCESS; + } + + break; + } + + case FX_DRIVER_UNINIT: + { + /* Successful driver */ + status = lx_nand_flash_close(¤t_driver->flash_instance); + + if (status == LX_SUCCESS) + { + media_ptr->fx_media_driver_status = FX_SUCCESS; + } + else + { + media_ptr->fx_media_driver_status = FX_IO_ERROR; + } + + break; + } + + case FX_DRIVER_READ: + { + /* Setup the destination buffer and logical sector. */ + logical_sector = media_ptr->fx_media_driver_logical_sector; + destination_buffer =(UCHAR *)media_ptr->fx_media_driver_buffer; + + /* Loop to read sectors from flash. */ + for (i = 0; i < media_ptr->fx_media_driver_sectors; i++) + { + + /* Read a sector from NAND flash. */ + status = lx_nand_flash_sector_read(¤t_driver->flash_instance, logical_sector, destination_buffer); + + /* Determine if the read was successful. */ + if (status != LX_SUCCESS) + { + + /* Return an I/O error to FileX. */ + media_ptr->fx_media_driver_status = FX_IO_ERROR; + + return; + } + + /* Move to the next entries. */ + logical_sector++; + destination_buffer = destination_buffer + media_ptr->fx_media_bytes_per_sector; + } + + /* Successful driver request. */ + media_ptr->fx_media_driver_status = FX_SUCCESS; + + break; + } + + case FX_DRIVER_BOOT_READ: + { + + /* Read the boot record and return to the caller. */ + + /* Setup the destination buffer. */ + destination_buffer = (UCHAR *) media_ptr -> fx_media_driver_buffer; + + /* Read boot sector from NAND flash. */ + status = lx_nand_flash_sector_read(¤t_driver->flash_instance, 0, destination_buffer); + + /* Determine if the boot read was successful. */ + if (status != LX_SUCCESS) + { + /* Return an I/O error to FileX. */ + media_ptr -> fx_media_driver_status = FX_IO_ERROR; + + return; + } + + /* Successful driver request. */ + media_ptr -> fx_media_driver_status = FX_SUCCESS; + break; + } + + case FX_DRIVER_WRITE: + { + /* Setup the source buffer and logical sector. */ + logical_sector = media_ptr->fx_media_driver_logical_sector; + source_buffer = (UCHAR *) media_ptr->fx_media_driver_buffer; + + /* Loop to write sectors to flash. */ + for (i = 0; i < media_ptr->fx_media_driver_sectors; i++) + { + /* Write a sector to NAND flash. */ + status = lx_nand_flash_sector_write(¤t_driver->flash_instance, logical_sector, source_buffer); + + /* Determine if the write was successful. */ + if (status != LX_SUCCESS) + { + /* Return an I/O error to FileX. */ + media_ptr->fx_media_driver_status = FX_IO_ERROR; + return; + } + + /* Move to the next entries. */ + logical_sector++; + source_buffer = source_buffer + media_ptr->fx_media_bytes_per_sector; + } + + /* Successful driver request. */ + media_ptr->fx_media_driver_status = FX_SUCCESS; + break; + } + + case FX_DRIVER_BOOT_WRITE: + { + + /* Write the boot record and return to the caller. */ + + /* Setup the source buffer. */ + source_buffer = (UCHAR *) media_ptr -> fx_media_driver_buffer; + + /* Write boot sector to NAND flash. */ + status = lx_nand_flash_sector_write(¤t_driver->flash_instance, 0, source_buffer); + + /* Determine if the boot write was successful. */ + if (status != LX_SUCCESS) + { + + /* Return an I/O error to FileX. */ + media_ptr -> fx_media_driver_status = FX_IO_ERROR; + + return; + } + + /* Successful driver request. */ + media_ptr -> fx_media_driver_status = FX_SUCCESS; + break ; + } + case FX_DRIVER_RELEASE_SECTORS: + { + /* Setup the logical sector. */ + logical_sector = media_ptr->fx_media_driver_logical_sector; + + /* Release sectors. */ + for (i = 0; i < media_ptr->fx_media_driver_sectors; i++) + { + /* Release NAND flash sector. */ + status = lx_nand_flash_sector_release(¤t_driver->flash_instance, logical_sector); + + /* Determine if the sector release was successful. */ + if (status != LX_SUCCESS) + { + /* Return an I/O error to FileX. */ + media_ptr->fx_media_driver_status = FX_IO_ERROR; + return; + } + + /* Move to the next entries. */ + logical_sector++; + } + + /* Successful driver request. */ + media_ptr->fx_media_driver_status = FX_SUCCESS; + break; + } + + case FX_DRIVER_FLUSH: + { + /* Return driver success. */ + media_ptr->fx_media_driver_status = FX_SUCCESS; + break; + } + + case FX_DRIVER_ABORT: + { + /* Return driver success. */ + media_ptr->fx_media_driver_status = FX_SUCCESS; + break; + } + + default: + { + /* Invalid driver request. */ + media_ptr->fx_media_driver_status = FX_IO_ERROR; + break; + } + } +} diff --git a/common/stm32/fx_stm32_levelx_nor_driver.c b/common/stm32/fx_stm32_levelx_nor_driver.c new file mode 100644 index 0000000..09a6dc5 --- /dev/null +++ b/common/stm32/fx_stm32_levelx_nor_driver.c @@ -0,0 +1,414 @@ +/**************************************************************************/ +/* */ +/* Copyright (c) Microsoft Corporation. All rights reserved. */ +/* */ +/* This software is licensed under the Microsoft Software License */ +/* Terms for Microsoft Azure RTOS. Full text of the license can be */ +/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ +/* and in the root directory of this software. */ +/* */ +/**************************************************************************/ + +#include "fx_stm32_levelx_nor_driver.h" + +/* define the struct used to identify the levelx driver to instantiate */ +struct fx_lx_nor_driver_instance +{ + LX_NOR_FLASH flash_instance; + + CHAR name[32]; +#ifndef LX_NOR_DISABLE_EXTENDED_CACHE +#if defined(LX_NOR_ENABLE_OBSOLETE_COUNT_CACHE) || defined(LX_NOR_ENABLE_MAPPING_BITMAP) + UCHAR *extended_nor_cache; + + ULONG extended_nor_cache_size; +#endif +#endif + UINT id; + + UINT (*nor_driver_initialize)(LX_NOR_FLASH *); + +}; + +#ifndef LX_NOR_DISABLE_EXTENDED_CACHE + +#ifdef LX_NOR_SIMULATOR_DRIVER + +#ifdef LX_NOR_ENABLE_MAPPING_BITMAP +#define LX_STM32_SIMULATOR_MAPPING_BITMAP_CACHE_SIZE ((LX_NOR_SIMULATOR_FLASH_SIZE / LX_NOR_SECTOR_SIZE) + 31) / 32 +#else +#define LX_STM32_SIMULATOR_MAPPING_BITMAP_CACHE_SIZE 0 +#endif + +#ifdef LX_NOR_ENABLE_OBSOLETE_COUNT_CACHE +#define LX_STM32_SIMULATOR_OBSOLETE_COUNT_CACHE_SIZE (LX_NOR_SIMULATOR_FLASH_SIZE / LX_NOR_SIMULATOR_SECTOR_SIZE) * sizeof(LX_NOR_OBSOLETE_COUNT_CACHE_TYPE) / 4 +#else +#define LX_STM32_SIMULATOR_OBSOLETE_COUNT_CACHE_SIZE 0 +#endif + +#if defined(LX_NOR_ENABLE_OBSOLETE_COUNT_CACHE) || defined(LX_NOR_ENABLE_MAPPING_BITMAP) +UCHAR lx_stm32_nor_simulator_extended_cache_memory[LX_STM32_SIMULATOR_OBSOLETE_COUNT_CACHE_SIZE + LX_STM32_SIMULATOR_MAPPING_BITMAP_CACHE_SIZE]; +#endif + +#endif //LX_NOR_SIMULATOR_DRIVER + +#ifdef LX_NOR_OSPI_DRIVER + +#ifdef LX_NOR_ENABLE_MAPPING_BITMAP +#define LX_STM32_OSPI_MAPPING_BITMAP_CACHE_SIZE ((LX_STM32_OSPI_FLASH_SIZE / LX_NOR_SECTOR_SIZE) + 31) / 32 +#else +#define LX_STM32_OSPI_MAPPING_BITMAP_CACHE_SIZE 0 +#endif + +#ifdef LX_NOR_ENABLE_OBSOLETE_COUNT_CACHE +#define LX_STM32_OSPI_OBSOLETE_COUNT_CACHE_SIZE (LX_STM32_OSPI_FLASH_SIZE / LX_STM32_OSPI_SECTOR_SIZE) * sizeof(LX_NOR_OBSOLETE_COUNT_CACHE_TYPE) / 4 +#else +#define LX_STM32_OSPI_OBSOLETE_COUNT_CACHE_SIZE 0 +#endif + +#if defined(LX_NOR_ENABLE_OBSOLETE_COUNT_CACHE) || defined(LX_NOR_ENABLE_MAPPING_BITMAP) +UCHAR lx_stm32_nor_ospi_extended_cache_memory[LX_STM32_OSPI_OBSOLETE_COUNT_CACHE_SIZE + LX_STM32_OSPI_MAPPING_BITMAP_CACHE_SIZE]; +#endif + +#endif //LX_NOR_OSPI_DRIVER + +#ifdef LX_NOR_QSPI_DRIVER + +#ifdef LX_NOR_ENABLE_MAPPING_BITMAP +#define LX_STM32_QSPI_MAPPING_BITMAP_CACHE_SIZE ((LX_STM32_QSPI_FLASH_SIZE / LX_NOR_SECTOR_SIZE) + 31) / 32 +#else +#define LX_STM32_QSPI_MAPPING_BITMAP_CACHE_SIZE 0 +#endif + +#ifdef LX_NOR_ENABLE_OBSOLETE_COUNT_CACHE +#define LX_STM32_QSPI_OBSOLETE_COUNT_CACHE_SIZE (LX_STM32_QSPI_FLASH_SIZE / LX_STM32_QSPI_SECTOR_SIZE) * sizeof(LX_NOR_OBSOLETE_COUNT_CACHE_TYPE) / 4 +#else +#define LX_STM32_QSPI_OBSOLETE_COUNT_CACHE_SIZE 0 +#endif + +#if defined(LX_NOR_ENABLE_OBSOLETE_COUNT_CACHE) || defined(LX_NOR_ENABLE_MAPPING_BITMAP) +UCHAR lx_stm32_nor_qspi_extended_cache_memory[LX_STM32_QSPI_OBSOLETE_COUNT_CACHE_SIZE + LX_STM32_QSPI_MAPPING_BITMAP_CACHE_SIZE]; +#endif + +#endif //LX_NOR_QSPI_DRIVER + +#endif //LX_NOR_DISABLE_EXTENDED_CACHE + +static struct fx_lx_nor_driver_instance fx_lx_nor_drivers[MAX_LX_NOR_DRIVERS] = +{ +#ifdef LX_NOR_SIMULATOR_DRIVER + { .name = LX_NOR_SIMULATOR_DRIVER_NAME, + .id = LX_NOR_SIMULATOR_DRIVER_ID, + .nor_driver_initialize = lx_stm32_nor_simulator_initialize, + #ifndef LX_NOR_DISABLE_EXTENDED_CACHE + #if defined(LX_NOR_ENABLE_OBSOLETE_COUNT_CACHE) || defined(LX_NOR_ENABLE_MAPPING_BITMAP) + .extended_nor_cache = lx_stm32_nor_simulator_extended_cache_memory, + .extended_nor_cache_size = sizeof(lx_stm32_nor_simulator_extended_cache_memory), + #endif + #endif + } +#endif + +#ifdef LX_NOR_OSPI_DRIVER + { .name = LX_NOR_OSPI_DRIVER_NAME, + .id = LX_NOR_OSPI_DRIVER_ID, + .nor_driver_initialize = lx_stm32_ospi_initialize, + #ifndef LX_NOR_DISABLE_EXTENDED_CACHE + #if defined(LX_NOR_ENABLE_OBSOLETE_COUNT_CACHE) || defined(LX_NOR_ENABLE_MAPPING_BITMAP) + .extended_nor_cache = lx_stm32_nor_ospi_extended_cache_memory, + .extended_nor_cache_size = sizeof(lx_stm32_nor_ospi_extended_cache_memory), + #endif + #endif + } +#endif + +#ifdef LX_NOR_QSPI_DRIVER + { .name = LX_NOR_QSPI_DRIVER_NAME, + .id = LX_NOR_QSPI_DRIVER_ID, + .nor_driver_initialize = lx_stm32_qspi_initialize, + #ifndef LX_NOR_DISABLE_EXTENDED_CACHE + #if defined(LX_NOR_ENABLE_OBSOLETE_COUNT_CACHE) || defined(LX_NOR_ENABLE_MAPPING_BITMAP) + .extended_nor_cache = lx_stm32_nor_qspi_extended_cache_memory, + .extended_nor_cache_size = sizeof(lx_stm32_nor_qspi_extended_cache_memory), + #endif + #endif + } +#endif + +#ifdef LX_NOR_CUSTOM_DRIVER + LX_NOR_CUSTOM_DRIVERS +#endif +}; + +static struct fx_lx_nor_driver_instance *current_driver = NULL; + +/* Exported constants --------------------------------------------------------*/ +static ULONG num_drivers = sizeof(fx_lx_nor_drivers)/sizeof(fx_lx_nor_drivers[0]); + +/* Exported functions ------------------------------------------------------- */ + +static UINT find_driver_id(UINT driver_id) +{ + UINT i = 0; + + for (i = 0; i < num_drivers; i++) + { + if (fx_lx_nor_drivers[i].id == driver_id) + return i; + } + + return UNKNOWN_DRIVER_ID; +} + +VOID fx_stm32_levelx_nor_driver(FX_MEDIA *media_ptr) +{ + ULONG i; + UINT status; + UCHAR *source_buffer; + UCHAR *destination_buffer; + ULONG logical_sector; + + + /* Process the driver request specified in the media control block.*/ +#ifdef USE_LX_NOR_DEFAULT_DRIVER + i = find_driver_id(NOR_DEFAULT_DRIVER); +#else + if (media_ptr->fx_media_driver_info == NULL) + { + i = UNKNOWN_DRIVER_ID; + } + else + { + i = find_driver_id((UINT)media_ptr->fx_media_driver_info); + } + +#endif + + if (i == UNKNOWN_DRIVER_ID) + { + /* No Driver found return an error */ + media_ptr->fx_media_driver_status = FX_MEDIA_INVALID; + return; + } + else + { + current_driver = &fx_lx_nor_drivers[i]; + } + + switch(media_ptr->fx_media_driver_request) + { + + case FX_DRIVER_INIT: + { + /* Open flash instance*/ + status = lx_nor_flash_open(¤t_driver->flash_instance, current_driver->name, current_driver->nor_driver_initialize); +#ifndef LX_NOR_DISABLE_EXTENDED_CACHE + +#if defined(LX_NOR_ENABLE_OBSOLETE_COUNT_CACHE) || defined(LX_NOR_ENABLE_MAPPING_BITMAP) + + if (status == LX_SUCCESS) + { + /* Enable the NOR flash cache for the flash_instance */ + status = lx_nor_flash_extended_cache_enable(¤t_driver->flash_instance, current_driver->extended_nor_cache, current_driver->extended_nor_cache_size); + } +#endif //(LX_NOR_ENABLE_OBSOLETE_COUNT_CACHE) || defined(LX_NOR_ENABLE_MAPPING_BITMAP) + +#endif //LX_NOR_DISABLE_EXTENDED_CACHE + /* LevelX driver correctly initialized */ + if (status == LX_SUCCESS) + { + media_ptr->fx_media_driver_status = FX_SUCCESS; + + media_ptr->fx_media_driver_free_sector_update = FX_TRUE; + + break; + } + else + { + media_ptr->fx_media_driver_status = FX_IO_ERROR; + } + + break; + } + + case FX_DRIVER_UNINIT: + { + /* Successful driver */ + status = lx_nor_flash_close(¤t_driver->flash_instance); + + if (status == LX_SUCCESS) + { + media_ptr->fx_media_driver_status = FX_SUCCESS; + } + else + { + media_ptr->fx_media_driver_status = FX_IO_ERROR; + } + + break; + } + + case FX_DRIVER_READ: + { + /* Setup the destination buffer and logical sector. */ + logical_sector = media_ptr->fx_media_driver_logical_sector; + destination_buffer =(UCHAR *)media_ptr->fx_media_driver_buffer; + + /* Loop to read sectors from flash. */ + for (i = 0; i < media_ptr->fx_media_driver_sectors; i++) + { + + /* Read a sector from NOR flash. */ + status = lx_nor_flash_sector_read(¤t_driver->flash_instance, logical_sector, destination_buffer); + + /* Determine if the read was successful. */ + if (status != LX_SUCCESS) + { + + /* Return an I/O error to FileX. */ + media_ptr->fx_media_driver_status = FX_IO_ERROR; + + return; + } + + /* Move to the next entries. */ + logical_sector++; + destination_buffer = destination_buffer + media_ptr->fx_media_bytes_per_sector; + } + + /* Successful driver request. */ + media_ptr->fx_media_driver_status = FX_SUCCESS; + + break; + } + + case FX_DRIVER_BOOT_READ: + { + + /* Read the boot record and return to the caller. */ + + /* Setup the destination buffer. */ + destination_buffer = (UCHAR *) media_ptr -> fx_media_driver_buffer; + + /* Read boot sector from NOR flash. */ + status = lx_nor_flash_sector_read(¤t_driver->flash_instance, 0, destination_buffer); + + /* Determine if the boot read was successful. */ + if (status != LX_SUCCESS) + { + /* Return an I/O error to FileX. */ + media_ptr -> fx_media_driver_status = FX_IO_ERROR; + + return; + } + + /* Successful driver request. */ + media_ptr -> fx_media_driver_status = FX_SUCCESS; + break; + } + + case FX_DRIVER_WRITE: + { + /* Setup the source buffer and logical sector. */ + logical_sector = media_ptr->fx_media_driver_logical_sector; + source_buffer = (UCHAR *) media_ptr->fx_media_driver_buffer; + + /* Loop to write sectors to flash. */ + for (i = 0; i < media_ptr->fx_media_driver_sectors; i++) + { + /* Write a sector to NOR flash. */ + status = lx_nor_flash_sector_write(¤t_driver->flash_instance, logical_sector, source_buffer); + + /* Determine if the write was successful. */ + if (status != LX_SUCCESS) + { + /* Return an I/O error to FileX. */ + media_ptr->fx_media_driver_status = FX_IO_ERROR; + return; + } + + /* Move to the next entries. */ + logical_sector++; + source_buffer = source_buffer + media_ptr->fx_media_bytes_per_sector; + } + + /* Successful driver request. */ + media_ptr->fx_media_driver_status = FX_SUCCESS; + break; + } + + case FX_DRIVER_BOOT_WRITE: + { + + /* Write the boot record and return to the caller. */ + + /* Setup the source buffer. */ + source_buffer = (UCHAR *) media_ptr -> fx_media_driver_buffer; + + /* Write boot sector to NOR flash. */ + status = lx_nor_flash_sector_write(¤t_driver->flash_instance, 0, source_buffer); + + /* Determine if the boot write was successful. */ + if (status != LX_SUCCESS) + { + + /* Return an I/O error to FileX. */ + media_ptr -> fx_media_driver_status = FX_IO_ERROR; + + return; + } + + /* Successful driver request. */ + media_ptr -> fx_media_driver_status = FX_SUCCESS; + break ; + } + case FX_DRIVER_RELEASE_SECTORS: + { + /* Setup the logical sector. */ + logical_sector = media_ptr->fx_media_driver_logical_sector; + + /* Release sectors. */ + for (i = 0; i < media_ptr->fx_media_driver_sectors; i++) + { + /* Release NOR flash sector. */ + status = lx_nor_flash_sector_release(¤t_driver->flash_instance, logical_sector); + + /* Determine if the sector release was successful. */ + if (status != LX_SUCCESS) + { + /* Return an I/O error to FileX. */ + media_ptr->fx_media_driver_status = FX_IO_ERROR; + return; + } + + /* Move to the next entries. */ + logical_sector++; + } + + /* Successful driver request. */ + media_ptr->fx_media_driver_status = FX_SUCCESS; + break; + } + + case FX_DRIVER_FLUSH: + { + /* Return driver success. */ + media_ptr->fx_media_driver_status = FX_SUCCESS; + break; + } + + case FX_DRIVER_ABORT: + { + /* Return driver success. */ + media_ptr->fx_media_driver_status = FX_SUCCESS; + break; + } + + default: + { + /* Invalid driver request. */ + media_ptr->fx_media_driver_status = FX_IO_ERROR; + break; + } + } +} diff --git a/common/stm32/fx_stm32_mmc_driver.c b/common/stm32/fx_stm32_mmc_driver.c new file mode 100644 index 0000000..a4ce23a --- /dev/null +++ b/common/stm32/fx_stm32_mmc_driver.c @@ -0,0 +1,412 @@ +/**************************************************************************/ +/* */ +/* Partial Copyright (c) Microsoft Corporation. All rights reserved.*/ +/* */ +/* This software is licensed under the Microsoft Software License */ +/* Terms for Microsoft Azure RTOS. Full text of the license can be */ +/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ +/* and in the root directory of this software. */ +/* Partial Copyright (c) STMicroelctronics 2020. All rights reserved */ +/**************************************************************************/ + + +/* Include necessary system files. */ +#include "fx_stm32_mmc_driver.h" + +/* + * the scratch buffer is required when performing DMA transfers using unaligned addresses + * When CPU cache is enabled, the scratch buffer should be 32-byte aligned to match a whole cache line + * otherwise it is 4-byte aligned to match the DMA alignment constraints + */ + +#if (FX_STM32_MMC_CACHE_MAINTENANCE == 1) +static UCHAR scratch[FX_STM32_MMC_DEFAULT_SECTOR_SIZE] __attribute__ ((aligned (32))); +#else +static UCHAR scratch[FX_STM32_MMC_DEFAULT_SECTOR_SIZE] __attribute__ ((aligned (4))); +#endif + +UINT _fx_partition_offset_calculate(void *partition_sector, UINT partition, ULONG *partition_start, ULONG *partition_size); + +static UINT mmc_read_data(FX_MEDIA *media_ptr, ULONG sector, UINT num_sectors, UINT use_scratch_buffer); +static UINT mmc_write_data(FX_MEDIA *media_ptr, ULONG sector, UINT num_sectors, UINT use_scratch_buffer); + +static UINT is_initialized = 0; + + +static INT check_mmc_status(uint32_t instance) +{ + uint32_t start = FX_STM32_MMC_CURRENT_TIME(); + + while (FX_STM32_MMC_CURRENT_TIME() - start < FX_STM32_MMC_DEFAULT_TIMEOUT) + { + if (fx_stm32_mmc_get_status(instance) == 0) + { + return 0; + } + } + + return 1; +} + +/** +* @brief This function is the entry point to the STM32 SDIO disk driver. +* It relies on the STM32 peripheral library from ST. +* @param media_ptr: FileX's Media Config Block +* @retval None +*/ +VOID fx_stm32_mmc_driver(FX_MEDIA *media_ptr) +{ + UINT status; + UINT unaligned_buffer; + ULONG partition_start; + ULONG partition_size; + +#if (FX_STM32_MMC_INIT == 0) + /* the SD was initialized by the application */ + is_initialized = 1; +#endif + /* before performing any operation, check the status of the SDMMC */ + if (is_initialized == 1) + { + if (check_mmc_status(FX_STM32_MMC_INSTANCE) != 0) + { + media_ptr->fx_media_driver_status = FX_IO_ERROR; + return; + } + } + +#if (FX_STM32_MMC_DMA_API == 1) + /* the SD DMA requires a 4-byte aligned buffers */ + unaligned_buffer = (UINT)(media_ptr->fx_media_driver_buffer) & 0x3; +#else + /* if the DMA is not used there isn't any constraint on buffer alignment */ + unaligned_buffer = 0; +#endif + /* Process the driver request specified in the media control block. */ + switch(media_ptr->fx_media_driver_request) + { + case FX_DRIVER_INIT: + { + media_ptr->fx_media_driver_status = FX_SUCCESS; + + FX_STM32_MMC_PRE_INIT(media_ptr); + +#if (FX_STM32_MMC_INIT == 1) + /* Initialize the SD instance */ + if (is_initialized == 0) + { + status = fx_stm32_mmc_init(FX_STM32_MMC_INSTANCE); + + if (status == 0) + { + is_initialized = 1; + } + else + { + media_ptr->fx_media_driver_status = FX_IO_ERROR; + } + } +#endif + /* call post init user macro */ + FX_STM32_MMC_POST_INIT(media_ptr); + break; + } + + case FX_DRIVER_UNINIT: + { + media_ptr->fx_media_driver_status = FX_SUCCESS; + +#if (FX_STM32_MMC_INIT == 1) + status = fx_stm32_mmc_deinit(FX_STM32_MMC_INSTANCE); + + if (status == 0) + { + is_initialized = 0; + } + else + { + media_ptr->fx_media_driver_status = FX_IO_ERROR; + } +#endif + /* call post deinit processing */ + FX_STM32_MMC_POST_DEINIT(media_ptr); + + break; + } + + case FX_DRIVER_READ: + { + media_ptr->fx_media_driver_status = FX_IO_ERROR; + + if (mmc_read_data(media_ptr, media_ptr->fx_media_driver_logical_sector + media_ptr->fx_media_hidden_sectors, + media_ptr->fx_media_driver_sectors, unaligned_buffer) == FX_SUCCESS) + { + media_ptr->fx_media_driver_status = FX_SUCCESS; + } + + break; + } + + case FX_DRIVER_WRITE: + { + media_ptr->fx_media_driver_status = FX_IO_ERROR; + + if (mmc_write_data(media_ptr, media_ptr->fx_media_driver_logical_sector + media_ptr->fx_media_hidden_sectors, + media_ptr->fx_media_driver_sectors, unaligned_buffer) == FX_SUCCESS) + { + media_ptr->fx_media_driver_status = FX_SUCCESS; + } + + break; + } + + case FX_DRIVER_FLUSH: + { + /* Return driver success. */ + media_ptr->fx_media_driver_status = FX_SUCCESS; + break; + } + + case FX_DRIVER_ABORT: + { + media_ptr->fx_media_driver_status = FX_SUCCESS; + /* call post driver abort macro*/ + + FX_STM32_MMC_POST_ABORT(media_ptr); + + break; + } + + case FX_DRIVER_BOOT_READ: + { + /* the boot sector is the sector zero */ + status = mmc_read_data(media_ptr, 0, media_ptr->fx_media_driver_sectors, unaligned_buffer); + + if (status != FX_SUCCESS) + { + media_ptr->fx_media_driver_status = status; + break; + } + + /* Check if the sector 0 is the actual boot sector, otherwise calculate the offset into it. + Please note that this should belong to higher level of MW to do this check and it is here + as a temporary work solution */ + + partition_start = 0; + + status = _fx_partition_offset_calculate(media_ptr -> fx_media_driver_buffer, 0, + &partition_start, &partition_size); + + /* Check partition read error. */ + if (status) + { + /* Unsuccessful driver request. */ + media_ptr -> fx_media_driver_status = FX_IO_ERROR; + break; + } + + /* Now determine if there is a partition... */ + if (partition_start) + { + + if (check_mmc_status(FX_STM32_MMC_INSTANCE) != 0) + { + media_ptr->fx_media_driver_status = FX_IO_ERROR; + break; + } + + /* Yes, now lets read the actual boot record. */ + status = mmc_read_data(media_ptr, partition_start, media_ptr->fx_media_driver_sectors, unaligned_buffer); + + if (status != FX_SUCCESS) + { + media_ptr->fx_media_driver_status = status; + break; + } + } + + /* Successful driver request. */ + media_ptr -> fx_media_driver_status = FX_SUCCESS; + break; + } + + case FX_DRIVER_BOOT_WRITE: + { + status = mmc_write_data(media_ptr, 0, 1, unaligned_buffer); + + media_ptr->fx_media_driver_status = status; + + break; + } + + default: + { + media_ptr->fx_media_driver_status = FX_IO_ERROR; + break; + } + } +} + +/** +* @brief Read data from uSD into destination buffer +* @param FX_MEDIA *media_ptr a pointer the main FileX structure +* @param ULONG start_sector first sector to start reading from +* @param UINT num_sectors number of sectors to be read +* @param UINT use_scratch_buffer to enable scratch buffer usage or not. +* @retval FX_SUCCESS on success FX_BUFFER_ERROR / FX_ACCESS_ERROR / FX_IO_ERROR otherwise +*/ + +static UINT mmc_read_data(FX_MEDIA *media_ptr, ULONG start_sector, UINT num_sectors, UINT use_scratch_buffer) +{ + INT i = 0; + UINT status; + UCHAR *read_addr; + + /* perform the Pre read operations */ + FX_STM32_MMC_PRE_READ_TRANSFER(media_ptr); + + if (use_scratch_buffer) + { + read_addr = media_ptr->fx_media_driver_buffer; + + for (i = 0; i < num_sectors; i++) + { + /* Start reading into the scratch buffer */ + status = fx_stm32_mmc_read_blocks(FX_STM32_MMC_INSTANCE, (UINT *)scratch, (UINT)start_sector++, 1); + + if (status != 0) + { + /* read error occurred, call the error handler code then return immediately */ + FX_STM32_MMC_READ_TRANSFER_ERROR(status); + return FX_IO_ERROR; + } + + /* wait for read transfer notification */ + FX_STM32_MMC_READ_CPLT_NOTIFY(); + +#if (FX_STM32_MMC_CACHE_MAINTENANCE == 1) + invalidate_cache_by_addr((uint32_t*)scratch, FX_STM32_MMC_DEFAULT_SECTOR_SIZE); +#endif + + _fx_utility_memory_copy(scratch, read_addr, FX_STM32_MMC_DEFAULT_SECTOR_SIZE); + read_addr += FX_STM32_MMC_DEFAULT_SECTOR_SIZE; + } + + /* Check if all sectors were read */ + if (i == num_sectors) + { + status = FX_SUCCESS; + } + else + { + status = FX_BUFFER_ERROR; + } + } + else + { + + status = fx_stm32_mmc_read_blocks(FX_STM32_MMC_INSTANCE, (UINT *)media_ptr->fx_media_driver_buffer, (UINT)start_sector, num_sectors); + + if (status != 0) + { + /* read error occurred, call the error handler code then return immediately */ + FX_STM32_MMC_READ_TRANSFER_ERROR(status); + + return FX_IO_ERROR; + } + + /* wait for read transfer notification */ + FX_STM32_MMC_READ_CPLT_NOTIFY(); + +#if (FX_STM32_MMC_CACHE_MAINTENANCE == 1) + invalidate_cache_by_addr((uint32_t*)media_ptr->fx_media_driver_buffer, num_sectors * FX_STM32_MMC_DEFAULT_SECTOR_SIZE); +#endif + + status = FX_SUCCESS; + } + + /* Operation finished, call the post read macro if defined */ + + FX_STM32_MMC_POST_READ_TRANSFER(media_ptr); + return status; +} + +/** +* @brief write data buffer into the uSD +* @param FX_MEDIA *media_ptr a pointer the main FileX structure +* @param ULONG start_sector first sector to start writing from +* @param UINT num_sectors number of sectors to be written +* @param UINT use_scratch_buffer to enable scratch buffer usage or not. +* @retval FX_SUCCESS on success FX_BUFFER_ERROR / FX_ACCESS_ERROR / FX_IO_ERROR otherwise +*/ + +static UINT mmc_write_data(FX_MEDIA *media_ptr, ULONG start_sector, UINT num_sectors, UINT use_scratch_buffer) +{ + INT i = 0; + UINT status; + UCHAR *write_addr; + + /* call Pre write operation macro */ + FX_STM32_MMC_PRE_WRITE_TRANSFER(media_ptr); + + if (use_scratch_buffer) + { + write_addr = media_ptr->fx_media_driver_buffer; + + for (i = 0; i < num_sectors; i++) + { + _fx_utility_memory_copy(write_addr, scratch, FX_STM32_MMC_DEFAULT_SECTOR_SIZE); + write_addr += FX_STM32_MMC_DEFAULT_SECTOR_SIZE; + +#if (FX_STM32_MMC_CACHE_MAINTENANCE == 1) + /* Clean the DCache to make the SD DMA see the actual content of the scratch buffer */ + clean_cache_by_addr((uint32_t*)scratch, FX_STM32_MMC_DEFAULT_SECTOR_SIZE); +#endif + + status = fx_stm32_mmc_write_blocks(FX_STM32_MMC_INSTANCE, (UINT *)scratch, (UINT)start_sector++, 1); + + if (status != 0) + { + /* in case of error call the error handling macro */ + FX_STM32_MMC_WRITE_TRANSFER_ERROR(status); + return FX_IO_ERROR; + } + + /* call the write completion notification macro */ + FX_STM32_MMC_WRITE_CPLT_NOTIFY(); + } + + if (i == num_sectors) + { + status = FX_SUCCESS; + } + else + { + status = FX_BUFFER_ERROR; + } + } + else + { +#if (FX_STM32_MMC_CACHE_MAINTENANCE == 1) + clean_cache_by_addr((uint32_t*)media_ptr->fx_media_driver_buffer, num_sectors * FX_STM32_MMC_DEFAULT_SECTOR_SIZE); +#endif + status = fx_stm32_mmc_write_blocks(FX_STM32_MMC_INSTANCE, (UINT *)media_ptr->fx_media_driver_buffer, (UINT)start_sector, num_sectors); + + if (status != 0) + { + FX_STM32_MMC_WRITE_TRANSFER_ERROR(status); + return FX_IO_ERROR; + } + + /* when defined, wait for the write notification */ + FX_STM32_MMC_WRITE_CPLT_NOTIFY(); + + status = FX_SUCCESS; + } + + /* perform post write operations */ + FX_STM32_MMC_POST_WRITE_TRANSFER(media_ptr); + + + return status; +} diff --git a/common/stm32/fx_stm32_sd_driver.c b/common/stm32/fx_stm32_sd_driver.c new file mode 100644 index 0000000..94bc5d1 --- /dev/null +++ b/common/stm32/fx_stm32_sd_driver.c @@ -0,0 +1,411 @@ +/**************************************************************************/ +/* */ +/* Partial Copyright (c) Microsoft Corporation. All rights reserved.*/ +/* */ +/* This software is licensed under the Microsoft Software License */ +/* Terms for Microsoft Azure RTOS. Full text of the license can be */ +/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ +/* and in the root directory of this software. */ +/* Partial Copyright (c) STMicroelctronics 2020. All rights reserved */ +/**************************************************************************/ + + +/* Include necessary system files. */ +#include "fx_stm32_sd_driver.h" + +/* + * the scratch buffer is required when performing DMA transfers using unaligned addresses + * When CPU cache is enabled, the scratch buffer should be 32-byte aligned to match a whole cache line + * otherwise it is 4-byte aligned to match the DMA alignment constraints + */ + +#if (FX_STM32_SD_CACHE_MAINTENANCE == 1) +static UCHAR scratch[FX_STM32_SD_DEFAULT_SECTOR_SIZE] __attribute__ ((aligned (32))); +#else +static UCHAR scratch[FX_STM32_SD_DEFAULT_SECTOR_SIZE] __attribute__ ((aligned (4))); +#endif + +UINT _fx_partition_offset_calculate(void *partition_sector, UINT partition, ULONG *partition_start, ULONG *partition_size); + +static UINT sd_read_data(FX_MEDIA *media_ptr, ULONG sector, UINT num_sectors, UINT use_scratch_buffer); +static UINT sd_write_data(FX_MEDIA *media_ptr, ULONG sector, UINT num_sectors, UINT use_scratch_buffer); + +static UINT is_initialized = 0; + + +static INT check_sd_status(uint32_t instance) +{ + uint32_t start = FX_STM32_SD_CURRENT_TIME(); + + while (FX_STM32_SD_CURRENT_TIME() - start < FX_STM32_SD_DEFAULT_TIMEOUT) + { + if (fx_stm32_sd_get_status(instance) == 0) + { + return 0; + } + } + + return 1; +} + +/** +* @brief This function is the entry point to the STM32 SD disk driver. +* It relies on the STM32 peripheral library from ST. +* @param media_ptr: FileX's Media Config Block +* @retval None +*/ +VOID fx_stm32_sd_driver(FX_MEDIA *media_ptr) +{ + UINT status; + UINT unaligned_buffer; + ULONG partition_start; + ULONG partition_size; + +#if (FX_STM32_SD_INIT == 0) + /* the SD was initialized by the application */ + is_initialized = 1; +#endif + /* before performing any operation, check the status of the SD IP */ + if (is_initialized == 1) + { + if (check_sd_status(FX_STM32_SD_INSTANCE) != 0) + { + media_ptr->fx_media_driver_status = FX_IO_ERROR; + return; + } + } + +#if (FX_STM32_SD_DMA_API == 1) + /* the SD DMA requires a 4-byte aligned buffers */ + unaligned_buffer = (UINT)(media_ptr->fx_media_driver_buffer) & 0x3; +#else + /* if the DMA is not used there isn't any constraint on buffer alignment */ + unaligned_buffer = 0; +#endif + /* Process the driver request specified in the media control block. */ + switch(media_ptr->fx_media_driver_request) + { + case FX_DRIVER_INIT: + { + media_ptr->fx_media_driver_status = FX_SUCCESS; + + FX_STM32_SD_PRE_INIT(media_ptr); + +#if (FX_STM32_SD_INIT == 1) + /* Initialize the SD instance */ + if (is_initialized == 0) + { + status = fx_stm32_sd_init(FX_STM32_SD_INSTANCE); + + if (status == 0) + { + is_initialized = 1; + } + else + { + media_ptr->fx_media_driver_status = FX_IO_ERROR; + } + } +#endif + /* call post init user macro */ + FX_STM32_SD_POST_INIT(media_ptr); + break; + } + + case FX_DRIVER_UNINIT: + { + media_ptr->fx_media_driver_status = FX_SUCCESS; + +#if (FX_STM32_SD_INIT == 1) + status = fx_stm32_sd_deinit(FX_STM32_SD_INSTANCE); + + if (status != 0) + { + media_ptr->fx_media_driver_status = FX_IO_ERROR; + } + else + { + is_initialized = 0; + } +#endif + /* call post deinit processing */ + FX_STM32_SD_POST_DEINIT(media_ptr); + + break; + } + + case FX_DRIVER_READ: + { + media_ptr->fx_media_driver_status = FX_IO_ERROR; + + if (sd_read_data(media_ptr, media_ptr->fx_media_driver_logical_sector + media_ptr->fx_media_hidden_sectors, + media_ptr->fx_media_driver_sectors, unaligned_buffer) == FX_SUCCESS) + { + media_ptr->fx_media_driver_status = FX_SUCCESS; + } + + break; + } + + case FX_DRIVER_WRITE: + { + media_ptr->fx_media_driver_status = FX_IO_ERROR; + + if (sd_write_data(media_ptr, media_ptr->fx_media_driver_logical_sector + media_ptr->fx_media_hidden_sectors, + media_ptr->fx_media_driver_sectors, unaligned_buffer) == FX_SUCCESS) + { + media_ptr->fx_media_driver_status = FX_SUCCESS; + } + + break; + } + + case FX_DRIVER_FLUSH: + { + /* Return driver success. */ + media_ptr->fx_media_driver_status = FX_SUCCESS; + break; + } + + case FX_DRIVER_ABORT: + { + /* Return driver success. */ + media_ptr->fx_media_driver_status = FX_SUCCESS; + + FX_STM32_SD_POST_ABORT(media_ptr); + break; + } + + case FX_DRIVER_BOOT_READ: + { + /* the boot sector is the sector zero */ + status = sd_read_data(media_ptr, 0, media_ptr->fx_media_driver_sectors, unaligned_buffer); + + if (status != FX_SUCCESS) + { + media_ptr->fx_media_driver_status = status; + break; + } + + /* Check if the sector 0 is the actual boot sector, otherwise calculate the offset into it. + Please note that this should belong to higher level of MW to do this check and it is here + as a temporary work solution */ + + partition_start = 0; + + status = _fx_partition_offset_calculate(media_ptr -> fx_media_driver_buffer, 0, + &partition_start, &partition_size); + + /* Check partition read error. */ + if (status) + { + /* Unsuccessful driver request. */ + media_ptr -> fx_media_driver_status = FX_IO_ERROR; + break; + } + + /* Now determine if there is a partition... */ + if (partition_start) + { + + if (check_sd_status(FX_STM32_SD_INSTANCE) != 0) + { + media_ptr->fx_media_driver_status = FX_IO_ERROR; + break; + } + + /* Yes, now lets read the actual boot record. */ + status = sd_read_data(media_ptr, partition_start, media_ptr->fx_media_driver_sectors, unaligned_buffer); + + if (status != FX_SUCCESS) + { + media_ptr->fx_media_driver_status = status; + break; + } + } + + /* Successful driver request. */ + media_ptr -> fx_media_driver_status = FX_SUCCESS; + break; + } + + case FX_DRIVER_BOOT_WRITE: + { + status = sd_write_data(media_ptr, 0, media_ptr->fx_media_driver_sectors, unaligned_buffer); + + media_ptr->fx_media_driver_status = status; + + break; + } + + default: + { + media_ptr->fx_media_driver_status = FX_IO_ERROR; + break; + } + } +} + +/** +* @brief Read data from uSD into destination buffer +* @param FX_MEDIA *media_ptr a pointer the main FileX structure +* @param ULONG start_sector first sector to start reading from +* @param UINT num_sectors number of sectors to be read +* @param UINT use_scratch_buffer to enable scratch buffer usage or not. +* @retval FX_SUCCESS on success FX_BUFFER_ERROR / FX_ACCESS_ERROR / FX_IO_ERROR otherwise +*/ + +static UINT sd_read_data(FX_MEDIA *media_ptr, ULONG start_sector, UINT num_sectors, UINT use_scratch_buffer) +{ + INT i = 0; + UINT status; + UCHAR *read_addr; + + /* perform the Pre read operations */ + FX_STM32_SD_PRE_READ_TRANSFER(media_ptr); + + if (use_scratch_buffer) + { + read_addr = media_ptr->fx_media_driver_buffer; + + for (i = 0; i < num_sectors; i++) + { + /* Start reading into the scratch buffer */ + status = fx_stm32_sd_read_blocks(FX_STM32_SD_INSTANCE, (UINT *)scratch, (UINT)start_sector++, 1); + + if (status != 0) + { + /* read error occurred, call the error handler code then return immediately */ + FX_STM32_SD_READ_TRANSFER_ERROR(status); + return FX_IO_ERROR; + } + + /* wait for read transfer notification */ + FX_STM32_SD_READ_CPLT_NOTIFY(); + +#if (FX_STM32_SD_CACHE_MAINTENANCE == 1) + invalidate_cache_by_addr((uint32_t*)scratch, FX_STM32_SD_DEFAULT_SECTOR_SIZE); +#endif + + _fx_utility_memory_copy(scratch, read_addr, FX_STM32_SD_DEFAULT_SECTOR_SIZE); + read_addr += FX_STM32_SD_DEFAULT_SECTOR_SIZE; + } + + /* Check if all sectors were read */ + if (i == num_sectors) + { + status = FX_SUCCESS; + } + else + { + status = FX_BUFFER_ERROR; + } + } + else + { + + status = fx_stm32_sd_read_blocks(FX_STM32_SD_INSTANCE, (UINT *)media_ptr->fx_media_driver_buffer, (UINT)start_sector, num_sectors); + + if (status != 0) + { + /* read error occurred, call the error handler code then return immediately */ + FX_STM32_SD_READ_TRANSFER_ERROR(status); + + return FX_IO_ERROR; + } + + /* wait for read transfer notification */ + FX_STM32_SD_READ_CPLT_NOTIFY(); + +#if (FX_STM32_SD_CACHE_MAINTENANCE == 1) + invalidate_cache_by_addr((uint32_t*)media_ptr->fx_media_driver_buffer, num_sectors * FX_STM32_SD_DEFAULT_SECTOR_SIZE); +#endif + + status = FX_SUCCESS; + } + + /* Operation finished, call the post read macro if defined */ + + FX_STM32_SD_POST_READ_TRANSFER(media_ptr); + return status; +} + +/** +* @brief write data buffer into the uSD +* @param FX_MEDIA *media_ptr a pointer the main FileX structure +* @param ULONG start_sector first sector to start writing from +* @param UINT num_sectors number of sectors to be written +* @param UINT use_scratch_buffer to enable scratch buffer usage or not. +* @retval FX_SUCCESS on success FX_BUFFER_ERROR / FX_ACCESS_ERROR / FX_IO_ERROR otherwise +*/ + +static UINT sd_write_data(FX_MEDIA *media_ptr, ULONG start_sector, UINT num_sectors, UINT use_scratch_buffer) +{ + INT i = 0; + UINT status; + UCHAR *write_addr; + + /* call Pre write operation macro */ + FX_STM32_SD_PRE_WRITE_TRANSFER(media_ptr); + + if (use_scratch_buffer) + { + write_addr = media_ptr->fx_media_driver_buffer; + + for (i = 0; i < num_sectors; i++) + { + _fx_utility_memory_copy(write_addr, scratch, FX_STM32_SD_DEFAULT_SECTOR_SIZE); + write_addr += FX_STM32_SD_DEFAULT_SECTOR_SIZE; + +#if (FX_STM32_SD_CACHE_MAINTENANCE == 1) + /* Clean the DCache to make the SD DMA see the actual content of the scratch buffer */ + clean_cache_by_addr((uint32_t*)scratch, FX_STM32_SD_DEFAULT_SECTOR_SIZE); +#endif + + status = fx_stm32_sd_write_blocks(FX_STM32_SD_INSTANCE, (UINT *)scratch, (UINT)start_sector++, 1); + + if (status != 0) + { + /* in case of error call the error handling macro */ + FX_STM32_SD_WRITE_TRANSFER_ERROR(status); + return FX_IO_ERROR; + } + + /* */ + FX_STM32_SD_WRITE_CPLT_NOTIFY(); + } + + if (i == num_sectors) + { + status = FX_SUCCESS; + } + else + { + status = FX_BUFFER_ERROR; + } + } + else + { +#if (FX_STM32_SD_CACHE_MAINTENANCE == 1) + clean_cache_by_addr((uint32_t*)media_ptr->fx_media_driver_buffer, num_sectors * FX_STM32_SD_DEFAULT_SECTOR_SIZE); +#endif + status = fx_stm32_sd_write_blocks(FX_STM32_SD_INSTANCE, (UINT *)media_ptr->fx_media_driver_buffer, (UINT)start_sector, num_sectors); + + if (status != 0) + { + FX_STM32_SD_WRITE_TRANSFER_ERROR(status); + return FX_IO_ERROR; + } + + /* when defined, wait for the write notification */ + FX_STM32_SD_WRITE_CPLT_NOTIFY(); + + status = FX_SUCCESS; + } + + /* perform post write operations */ + FX_STM32_SD_POST_WRITE_TRANSFER(media_ptr); + + + return status; +} diff --git a/common/stm32/fx_stm32_sram_driver.c b/common/stm32/fx_stm32_sram_driver.c new file mode 100644 index 0000000..5c00444 --- /dev/null +++ b/common/stm32/fx_stm32_sram_driver.c @@ -0,0 +1,168 @@ + +/**************************************************************************/ +/* */ +/* Copyright (c) Microsoft Corporation. All rights reserved. */ +/* */ +/* This software is licensed under the Microsoft Software License */ +/* Terms for Microsoft Azure RTOS. Full text of the license can be */ +/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ +/* and in the root directory of this software. */ +/* */ +/**************************************************************************/ + + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** FileX Component */ +/** */ +/** RAM Disk Driver */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + + +/* Include necessary system files. */ +#include "fx_stm32_sram_driver.h" + +static UINT is_initialized = 0; +VOID fx_stm32_sram_driver(FX_MEDIA *media_ptr) +{ + +UCHAR *source_buffer; +UCHAR *destination_buffer; +UINT bytes_per_sector; + + /* Process the driver request specified in the media control block. */ + switch (media_ptr->fx_media_driver_request) + { + + case FX_DRIVER_INIT: + { + /* + * the FX_DRIVER_INIT can be requested either from the fx_media_format() or fx_media_open() + * as the RAM memory should be always formatted before being used, by memset'ing it to '\0' + * we need to avoid double initialization to keep the file system integrity. + */ + if (is_initialized == 0) + { + _fx_utility_memory_set((UCHAR *)FX_SRAM_DISK_BASE_ADDRESS, '\0', FX_SRAM_DISK_SIZE); + is_initialized = 1; + } + media_ptr -> fx_media_driver_status = FX_SUCCESS; + break; + } + + case FX_DRIVER_UNINIT: + { + /* there is nothing to do for FX_DRIVER_UNINIT request + * set the media driver status to FX_SUCCESS. + */ + media_ptr -> fx_media_driver_status = FX_SUCCESS; + break; + } + + case FX_DRIVER_READ: + { + + /* Calculate the RAM disk sector offset.*/ + source_buffer = ((UCHAR *)FX_SRAM_DISK_BASE_ADDRESS) + + ((media_ptr->fx_media_driver_logical_sector + media_ptr->fx_media_hidden_sectors) * media_ptr->fx_media_bytes_per_sector); + + /* Copy the RAM sector into the destination. */ + _fx_utility_memory_copy(source_buffer, media_ptr -> fx_media_driver_buffer, + media_ptr->fx_media_driver_sectors * media_ptr->fx_media_bytes_per_sector); + + /* Successful driver request. */ + media_ptr->fx_media_driver_status = FX_SUCCESS; + break; + } + + case FX_DRIVER_WRITE: + { + + /* Calculate the RAM disk sector offset */ + destination_buffer = (UCHAR *)FX_SRAM_DISK_BASE_ADDRESS + + ((media_ptr->fx_media_driver_logical_sector + media_ptr->fx_media_hidden_sectors) * media_ptr->fx_media_bytes_per_sector); + + /* Copy the source to the RAM sector. */ + _fx_utility_memory_copy(media_ptr->fx_media_driver_buffer, destination_buffer, + media_ptr->fx_media_driver_sectors * media_ptr->fx_media_bytes_per_sector); + + /* Successful driver request. */ + media_ptr -> fx_media_driver_status = FX_SUCCESS; + break; + } + + case FX_DRIVER_FLUSH: + { + + /* + * Nothing to do for the FX_DRIVER_FLUSH Return driver success. + */ + media_ptr->fx_media_driver_status = FX_SUCCESS; + break; + } + + case FX_DRIVER_ABORT: + { + + /* + * Nothing to do for the FX_DRIVER_ABORT Return driver success. + */ + media_ptr->fx_media_driver_status = FX_SUCCESS; + break; + } + + case FX_DRIVER_BOOT_READ: + { + + /* Calculate the RAM disk boot sector offset, which is at the very beginning of + * the RAM disk. + */ + source_buffer = (UCHAR *)FX_SRAM_DISK_BASE_ADDRESS; + /* For RAM disk only, pickup the bytes per sector.*/ + + bytes_per_sector = _fx_utility_16_unsigned_read(&source_buffer[FX_BYTES_SECTOR]); + + /* Ensure this is less than the media memory size. */ + if (bytes_per_sector > media_ptr->fx_media_memory_size) + { + media_ptr->fx_media_driver_status = FX_BUFFER_ERROR; + break; + } + + /* Copy the RAM boot sector into the destination. */ + _fx_utility_memory_copy(source_buffer, media_ptr -> fx_media_driver_buffer, + bytes_per_sector); + + /* Successful driver request. */ + media_ptr -> fx_media_driver_status = FX_SUCCESS; + break; + } + + case FX_DRIVER_BOOT_WRITE: + { + + /* + * Calculate the RAM disk boot sector offset, which is at the very beginning of the RAM disk. + */ + destination_buffer = (UCHAR *)FX_SRAM_DISK_BASE_ADDRESS; + + /* Copy the RAM boot sector into the destination. */ + _fx_utility_memory_copy(media_ptr->fx_media_driver_buffer, destination_buffer, + media_ptr->fx_media_bytes_per_sector); + + /* Successful driver request. */ + media_ptr -> fx_media_driver_status = FX_SUCCESS; + break; + } + + default: + { + /* Invalid driver request. */ + media_ptr -> fx_media_driver_status = FX_IO_ERROR; + break; + } + } +} diff --git a/common/stm32/template/fx_stm32_levelx_nand_driver.h b/common/stm32/template/fx_stm32_levelx_nand_driver.h new file mode 100644 index 0000000..7923fa4 --- /dev/null +++ b/common/stm32/template/fx_stm32_levelx_nand_driver.h @@ -0,0 +1,115 @@ +/**************************************************************************/ +/* */ +/* Copyright (c) Microsoft Corporation. All rights reserved. */ +/* */ +/* This software is licensed under the Microsoft Software License */ +/* Terms for Microsoft Azure RTOS. Full text of the license can be */ +/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ +/* and in the root directory of this software. */ +/* */ +/**************************************************************************/ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef FX_STM32_LX_NAND_DRIVER_H +#define FX_STM32_LX_NAND_DRIVER_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "fx_api.h" +#include "lx_api.h" + +/* enable the driver to be used */ + +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ +/* Exported types ------------------------------------------------------------*/ +/* USER CODE BEGIN ET */ + +/* USER CODE END ET */ + +/* Exported constants --------------------------------------------------------*/ + +#ifdef LX_NAND_SIMULATOR_DRIVER +#include "lx_stm32_nand_simulator_driver.h" + +#define LX_NAND_SIMULATOR_DRIVER_ID 0x01 +#define LX_NAND_SIMULATOR_DRIVER_NAME "FX Levelx NAND flash Simulator" +#endif + + +#ifdef LX_NAND_CUSTOM_DRIVER +/* + * define the Custom levelx nand drivers to be supported by the filex + * for example: + +#define CUSTOM_DRIVER_ID 0xABCDEF +#define NAND_CUSTOM_DRIVER_NAME "NAND CUSTOM DRIVER" +#include "lx_nand_custom_driver.h" +#define LX_NAND_CUSTOM_DRIVERS {.name = NAND_CUSTOM_DRIVER_NAME, .id = CUSTOM_DRIVER_ID, .nand_driver_initialize = lx_nand_flash_initialize_driver} + */ + +/* USER CODE BEGIN CUSTOM_DRIVER */ + +/* USER CODE END CUSTOM_DRIVER */ + +#endif + +#define MAX_LX_NAND_DRIVERS 8 +#define UNKNOWN_DRIVER_ID 0xFFFFFFFF + +/* to enable a default NAND driver: + - define the flags LX_NAND_DEFAULT_DRIVER + - Provide the driver ID in the NOR_DEFAULT_DRIVER for example + #define NAND_DEFAULT_DRIVER LX_NAND_SIMULATOR_DRIVER_ID +*/ + + +/* USER CODE BEGIN DEFAULT_DRIVER */ + +/* USER CODE END DEFAULT_DRIVER */ + +#ifdef LX_NAND_DEFAULT_DRIVER + +/* USER CODE BEGIN DEFAULT_DRIVER */ + +/* USER CODE END DEFAULT_DRIVER */ +#endif + +/* USER CODE BEGIN EC */ + +/* USER CODE END EC */ + +/* Exported macro ------------------------------------------------------------*/ +/* USER CODE BEGIN EM */ + +/* #define FX_NAND_FORMAT_FLASH_BEFORE_OPEN */ + +/* USER CODE END EM */ +#if !defined(LX_NAND_DEFAULT_DRIVER) && !defined (LX_NAND_CUSTOM_DRIVERS) && !defined(LX_NAND_SIMULATOR_DRIVER) +#error "[This error was thrown on purpose] : No NAND lowlevel driver defined" +#endif +/* Exported functions prototypes ---------------------------------------------*/ +VOID fx_stm32_levelx_nand_driver(FX_MEDIA *media_ptr); + +/* USER CODE BEGIN EFP */ + +/* USER CODE END EFP */ + +/* Private defines -----------------------------------------------------------*/ +/* USER CODE BEGIN PD */ + +/* USER CODE END PD */ + +/* USER CODE BEGIN 1 */ + +/* USER CODE END 1 */ + +#ifdef __cplusplus +} +#endif + +#endif /*FX_STM32_LX_NAND_DRIVER_H*/ diff --git a/common/stm32/template/fx_stm32_levelx_nor_driver.h b/common/stm32/template/fx_stm32_levelx_nor_driver.h new file mode 100644 index 0000000..fa07bfb --- /dev/null +++ b/common/stm32/template/fx_stm32_levelx_nor_driver.h @@ -0,0 +1,143 @@ +/**************************************************************************/ +/* */ +/* Copyright (c) Microsoft Corporation. All rights reserved. */ +/* */ +/* This software is licensed under the Microsoft Software License */ +/* Terms for Microsoft Azure RTOS. Full text of the license can be */ +/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ +/* and in the root directory of this software. */ +/* */ +/**************************************************************************/ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef FX_STM32_LX_NOR_DRIVER_H +#define FX_STM32_LX_NOR_DRIVER_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "fx_api.h" +#include "lx_api.h" + +/* #define LX_NOR_SIMULATOR_DRIVER */ +/* #define LX_NOR_OSPI_DRIVER */ +/* #define LX_NOR_QSPI_DRIVER */ +/* #define LX_NOR_CUSTOM_DRIVER */ + +#ifdef LX_NOR_SIMULATOR_DRIVER +#include "lx_stm32_nor_simulator_driver.h" + +#define LX_NOR_SIMULATOR_DRIVER_ID 0x01 +#define LX_NOR_SIMULATOR_DRIVER_NAME "FX Levelx NOR flash Simulator" +#endif + +#ifdef LX_NOR_OSPI_DRIVER +#include "lx_stm32_ospi_driver.h" + +#define LX_NOR_OSPI_DRIVER_ID 0x02 +#define LX_NOR_OSPI_DRIVER_NAME "FX Levelx OctoSPI driver" +#endif + +#ifdef LX_NOR_QSPI_DRIVER +#include "lx_stm32_qspi_driver.h" + +#define LX_NOR_QSPI_DRIVER_ID 0x03 +#define LX_NOR_QSPI_DRIVER_NAME "FX Levelx QuadSPI driver" +#endif + +#ifdef LX_NOR_CUSTOM_DRIVER +/* + * define the Custom levelx nor drivers to be supported by the filex + * for example: + +#define CUSTOM_DRIVER_ID 0xABCDEF +#define NOR_CUSTOM_DRIVER_NAME "NOR CUSTOM DRIVER" +#include "lx_stm32_nor_custom_driver.h" + +#if !defined(LX_NOR_DISABLE_EXTENDED_CACHE) && (defined(LX_NOR_ENABLE_OBSOLETE_COUNT_CACHE) || defined(LX_NOR_ENABLE_MAPPING_BITMAP)) +// if the extended cache feature is enabled, the extended cache buffer and cache size should be defined in driver implementation file +extern UCHAR lx_stm32_nor_custom_extended_cache_memory[LX_STM32_CUSTOM_OBSOLETE_COUNT_CACHE_SIZE + LX_STM32_CUSTOM_MAPPING_BITMAP_CACHE_SIZE]; +#define LX_NOR_CUSTOM_DRIVERS {.name = "NOR CUSTOM DRIVER", .id = CUSTOM_DRIVER_ID, .nor_driver_initialize = lx_stm32_nor_custom_driver_initialize, \ + .extended_nor_cache = lx_stm32_nor_custom_extended_cache_memory, .extended_nor_cache_size = sizeof(lx_stm32_nor_custom_extended_cache_memory)} +#else +#define LX_NOR_CUSTOM_DRIVERS {.name = "NOR CUSTOM DRIVER", .id = CUSTOM_DRIVER_ID, .nor_driver_initialize = lx_stm32_nor_custom_driver_initialize} +#endif + */ + +/* USER CODE BEIGN NOR_CUSTOM_DRIVERS */ + +/* USER CODE END NOR_CUSTOM_DRIVERS */ + +#endif + +#define MAX_LX_NOR_DRIVERS 8 +#define UNKNOWN_DRIVER_ID 0xFFFFFFFF + + +/* to enable a default NOR driver: + - define the flags LX_NOR_DEFAULT_DRIVER + - Provide the driver ID in the NOR_DEFAULT_DRIVER for example + #define NOR_DEFAULT_DRIVER LX_NOR_QSPI_DRIVER_ID +*/ + + +/* USER CODE BEGIN DEFAULT_DRIVER */ + +/* USER CODE END DEFAULT_DRIVER */ + +#ifdef LX_NOR_DEFAULT_DRIVER + +/* USER CODE BEGIN DEFAULT_DRIVER */ + +/* USER CODE END DEFAULT_DRIVER */ +#endif + +#if !defined(NOR_DEFAULT_DRIVER) && !defined(LX_NOR_CUSTOM_DRIVERS) && !defined(LX_NOR_SIMULATOR_DRIVER) && !defined(LX_NOR_QSPI_DRIVER) && !defined(LX_NOR_OSPI_DRIVER) +#error "[This error was thrown on purpose] : No NOR lowlevel driver defined" +#endif + +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* Exported types ------------------------------------------------------------*/ +/* USER CODE BEGIN ET */ + +/* USER CODE END ET */ + +/* Exported constants --------------------------------------------------------*/ + + + +/* USER CODE BEGIN EC */ + +/* USER CODE END EC */ + +/* Exported macro ------------------------------------------------------------*/ +/* USER CODE BEGIN EM */ + +/* USER CODE END EM */ + +/* Exported functions prototypes ---------------------------------------------*/ +VOID fx_stm32_levelx_nor_driver(FX_MEDIA *media_ptr); + +/* USER CODE BEGIN EFP */ + +/* USER CODE END EFP */ + +/* Private defines -----------------------------------------------------------*/ +/* USER CODE BEGIN PD */ + +/* USER CODE END PD */ + +/* USER CODE BEGIN 1 */ + +/* USER CODE END 1 */ + +#ifdef __cplusplus +} +#endif + +#endif /*FX_STM32_LX_NOR_DRIVER_H*/ diff --git a/common/stm32/template/fx_stm32_mmc_driver.h b/common/stm32/template/fx_stm32_mmc_driver.h new file mode 100644 index 0000000..faa02ba --- /dev/null +++ b/common/stm32/template/fx_stm32_mmc_driver.h @@ -0,0 +1,139 @@ + +/**************************************************************************/ +/* */ +/* Copyright (c) Microsoft Corporation. All rights reserved. */ +/* */ +/* This software is licensed under the Microsoft Software License */ +/* Terms for Microsoft Azure RTOS. Full text of the license can be */ +/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ +/* and in the root directory of this software. */ +/* */ +/**************************************************************************/ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef FX_STM32_MMC_DRIVER_H +#define FX_STM32_MMC_DRIVER_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "fx_api.h" + +#include "stm32NNxx_hal.h" +/* Exported types ------------------------------------------------------------*/ +/* USER CODE BEGIN ET */ + +/* USER CODE END ET */ + +/* Exported constants --------------------------------------------------------*/ + +/* Default timeout used to wait for fx operations */ +#define FX_STM32_MMC_DEFAULT_TIMEOUT (10 * 1000) + +/* Default MMC sector size typically 512 for uMMC */ +#define FX_STM32_MMC_DEFAULT_SECTOR_SIZE 512 + +/* let the filex low-level driver initialize the MMC driver */ +#define FX_STM32_MMC_INIT 0 + +/* Use the MMC DMA API, when enabled cache maintenance + * may be required + */ +#define FX_STM32_MMC_DMA_API 0 + +/* Enable the cache maintenance, needed when using SD DMA + * and accessing buffers in cacheable area. + */ +#define FX_STM32_SD_CACHE_MAINTENANCE 0 + +/* MMC instance default to 0 */ +#define FX_STM32_MMC_INSTANCE 0 + +/* USER CODE BEGIN EC */ + +/* USER CODE END EC */ + +/* Exported macro ------------------------------------------------------------*/ +/* USER CODE BEGIN EM */ + +/* USER CODE END EM */ + +/* Get the current time in ticks */ + +#define FX_STM32_MMC_CURRENT_TIME + +/* Macro called before initializing the MMC driver + * for example to create a semaphore used for + * transfer notification + */ + +#define FX_STM32_MMC_PRE_INIT(_media_ptr) + +/* Macro called after initializing the MMC driver */ + +#define FX_STM32_MMC_POST_INIT(_media_ptr) + + +/* Macro called after the MMC deinit */ +#define FX_STM32_MMC_POST_DEINIT(_media_ptr) + +/* Macro called after the abort request */ +#define FX_STM32_MMC_POST_ABORT(_media_ptr) + +/* Macro called before performing read operation */ +#define FX_STM32_MMC_PRE_READ_TRANSFER(_media_ptr) + +/* Macro called after performing read operation */ +#define FX_STM32_MMC_POST_READ_TRANSFER(_media_ptr) + +/* Macro for read error handling */ +#define FX_STM32_MMC_READ_TRANSFER_ERROR(_status_) + +/* Define how to notify about Read completion operation */ +#define FX_STM32_MMC_READ_CPLT_NOTIFY() + +/* Define how to notify about write completion operation */ +#define FX_STM32_MMC_WRITE_CPLT_NOTIFY() + +/* Macro called before performing write operation */ +#define FX_STM32_MMC_PRE_WRITE_TRANSFER(__media_ptr__) + +/* Macro called after performing write operation */ +#define FX_STM32_MMC_POST_WRITE_TRANSFER(__media_ptr__) + +/* Macro for write error handling */ +#define FX_STM32_MMC_WRITE_TRANSFER_ERROR(__status__) + +/* Exported functions prototypes ---------------------------------------------*/ + +INT fx_stm32_mmc_init(UINT Instance); +INT fx_stm32_mmc_deinit(UINT Instance); + +INT fx_stm32_mmc_get_status(UINT Instance); + +INT fx_stm32_mmc_read_blocks(UINT Instance, UINT *Buffer, UINT StartSector, UINT NbrOfBlocks); +INT fx_stm32_mmc_write_blocks(UINT Instance, UINT *Buffer, UINT StartSector, UINT NbrOfBlocks); + +VOID fx_stm32_mmc_driver(FX_MEDIA *media_ptr); + +/* USER CODE BEGIN EFP */ + +/* USER CODE END EFP */ + +/* Private defines -----------------------------------------------------------*/ +/* USER CODE BEGIN PD */ + +/* USER CODE END PD */ + +/* USER CODE BEGIN 1 */ + +/* USER CODE END 1 */ + +#ifdef __cplusplus +} +#endif + +#endif /* FX_STM32_MMC_DRIVER_H */ + diff --git a/common/stm32/template/fx_stm32_mmc_driver_glue.c b/common/stm32/template/fx_stm32_mmc_driver_glue.c new file mode 100644 index 0000000..602eed4 --- /dev/null +++ b/common/stm32/template/fx_stm32_mmc_driver_glue.c @@ -0,0 +1,96 @@ +/**************************************************************************/ +/* */ +/* Copyright (c) Microsoft Corporation. All rights reserved. */ +/* */ +/* This software is licensed under the Microsoft Software License */ +/* Terms for Microsoft Azure RTOS. Full text of the license can be */ +/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ +/* and in the root directory of this software. */ +/* */ +/**************************************************************************/ + +#include "fx_stm32_mmc_driver.h" + +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ + +/** +* @brief Initializes the MMC IP instance +* @param UINT Instance MMC instance to initialize +* @retval 0 on success error value otherwise +*/ +INT fx_stm32_mmc_init(UINT instance) +{ + INT ret = 0; +/* USER CODE BEGIN FX_MMC_INIT */ + +/* USER CODE END FX_MMC_INIT */ + + return ret; +} + +/** +* @brief Deinitializes the MMC IP instance +* @param UINT Instance MMC instance to deinitialize +* @retval 0 on success error value otherwise +*/ +INT fx_stm32_mmc_deinit(UINT instance) +{ + INT ret = 0; +/* USER CODE BEGIN FX_MMC_DEINIT */ + +/* USER CODE END FX_MMC_DEINIT */ + + return ret; +} + +/** +* @brief Check the MMC IP status. +* @param UINT Instance MMC instance to check +* @retval 0 when ready 1 when busy +*/ +INT fx_stm32_mmc_get_status(UINT instance) +{ + INT ret = 0; +/* USER CODE BEGIN GET_STATUS */ + +/* USER CODE END GET_STATUS */ + return ret; +} + +/** +* @brief Read Data from the MMC device into a buffer. +* @param UINT *Buffer buffer into which the data is to be read. +* @param UINT StartBlock the first block to start reading from. +* @param UINT NbrOfBlocks total number of blocks to read. +*/ +INT fx_stm32_mmc_read_blocks(UINT instance, UINT *buffer, UINT start_block, UINT total_blocks) +{ + INT ret = 0; +/* USER CODE BEGIN READ_BLOCKS */ + +/* USER CODE END READ_BLOCKS */ + return ret; +} +/** +* @brief Write data buffer into the MMC device. +* @param UINT *Buffer buffer .to write into the MMC device. +* @param UINT StartBlock the first block to start writing from. +* @param UINT NbrOfBlocks total number of blocks to write. +* @retval 0 on success error code otherwise +*/ + +INT fx_stm32_mmc_write_blocks(UINT instance, UINT *buffer, UINT start_block, UINT total_blocks) +{ + INT ret = 0; +/* USER CODE BEGIN WRITE_BLOCKS */ + +/* USER CODE END WRITE_BLOCKS */ + return ret; + +} + +/* USER CODE BEGIN 1 */ + +/* USER CODE END 1 */ diff --git a/common/stm32/template/fx_stm32_sd_driver.h b/common/stm32/template/fx_stm32_sd_driver.h new file mode 100644 index 0000000..a304663 --- /dev/null +++ b/common/stm32/template/fx_stm32_sd_driver.h @@ -0,0 +1,144 @@ + +/**************************************************************************/ +/* */ +/* Copyright (c) Microsoft Corporation. All rights reserved. */ +/* */ +/* This software is licensed under the Microsoft Software License */ +/* Terms for Microsoft Azure RTOS. Full text of the license can be */ +/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ +/* and in the root directory of this software. */ +/* */ +/**************************************************************************/ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef FX_STM32_SD_DRIVER_H +#define FX_STM32_SD_DRIVER_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "fx_api.h" + +#include "stm32NNxx_hal.h" +/* Exported types ------------------------------------------------------------*/ +/* USER CODE BEGIN ET */ + +/* USER CODE END ET */ + +/* Exported constants --------------------------------------------------------*/ + +/* Default timeout used to wait for fx operations */ +#define FX_STM32_SD_DEFAULT_TIMEOUT 10000 + +/* Default SD sector size typically 512 for uSD */ +#define FX_STM32_SD_DEFAULT_SECTOR_SIZE 512 + +/* let the filex low-level driver initialize the SD driver */ +#define FX_STM32_SD_INIT 0 + +/* Use the SD DMA API, when enabled cache maintenance + * may be required + */ +#define FX_STM32_SD_DMA_API 0 + +/* Enable the cache maintenance, needed when using SD DMA + * and accessing buffers in cacheable area + */ + +#define FX_STM32_SD_CACHE_MAINTENANCE 0 + +/* SD instance default to 0 */ +#define FX_STM32_SD_INSTANCE 0 + +/* USER CODE BEGIN EC */ + +/* USER CODE END EC */ + +/* Exported macro ------------------------------------------------------------*/ +/* USER CODE BEGIN EM */ + +/* USER CODE END EM */ + +/* Get the current time in ticks */ + + +#define FX_STM32_SD_CURRENT_TIME() + + +/* Macro called before initializing the SD driver + * for example to create a semaphore used for + * transfer notification + */ + +#define FX_STM32_SD_PRE_INIT(_media_ptr) + + +/* Macro called after initializing the SD driver */ +#define FX_STM32_SD_POST_INIT(_media_ptr) + + +/* Macro called after the SD deinit */ +#define FX_STM32_SD_POST_DEINIT(_media_ptr) + + +#define FX_STM32_SD_POST_ABORT(_media_ptr) + +/* Macro called before performing read operation */ +#define FX_STM32_SD_PRE_READ_TRANSFER(_media_ptr) + + +/* Macro called after performing read operation */ +#define FX_STM32_SD_POST_READ_TRANSFER(_media_ptr) + +/* Macro for read error handling */ +#define FX_STM32_SD_READ_TRANSFER_ERROR(_status_) + +/* Define how to notify about Read completion operation */ +#define FX_STM32_SD_READ_CPLT_NOTIFY() + +/* Define how to notify about write completion operation */ +#define FX_STM32_SD_WRITE_CPLT_NOTIFY() + + +/* Macro called before performing write operation */ +#define FX_STM32_SD_PRE_WRITE_TRANSFER(__media_ptr__) + + +#define FX_STM32_SD_POST_WRITE_TRANSFER(_media_ptr) + +/* Macro for write error handling */ +#define FX_STM32_SD_WRITE_TRANSFER_ERROR(__status__) + +/* Exported functions prototypes ---------------------------------------------*/ + +INT fx_stm32_sd_init(UINT Instance); +INT fx_stm32_sd_deinit(UINT Instance); + +INT fx_stm32_sd_get_status(UINT Instance); + +INT fx_stm32_sd_read_blocks(UINT Instance, UINT *Buffer, UINT StartSector, UINT NbrOfBlocks); +INT fx_stm32_sd_write_blocks(UINT Instance, UINT *Buffer, UINT StartSector, UINT NbrOfBlocks); + +VOID fx_stm32_sd_driver(FX_MEDIA *media_ptr); + +/* USER CODE BEGIN EFP */ + +/* USER CODE END EFP */ + +/* Private defines -----------------------------------------------------------*/ +/* USER CODE BEGIN PD */ + +/* USER CODE END PD */ + +/* USER CODE BEGIN 1 */ + +/* USER CODE END 1 */ + +#ifdef __cplusplus +} +#endif + +#endif /* FX_STM32_SD_DRIVER_H */ + diff --git a/common/stm32/template/fx_stm32_sd_driver_dma_rtos.h b/common/stm32/template/fx_stm32_sd_driver_dma_rtos.h new file mode 100644 index 0000000..dfc4ce3 --- /dev/null +++ b/common/stm32/template/fx_stm32_sd_driver_dma_rtos.h @@ -0,0 +1,205 @@ + +/**************************************************************************/ +/* */ +/* Copyright (c) Microsoft Corporation. All rights reserved. */ +/* */ +/* This software is licensed under the Microsoft Software License */ +/* Terms for Microsoft Azure RTOS. Full text of the license can be */ +/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ +/* and in the root directory of this software. */ +/* */ +/**************************************************************************/ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef FX_STM32_SD_DRIVER_H +#define FX_STM32_SD_DRIVER_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "fx_api.h" + +#include "stm32NNxx_hal.h" +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* Exported types ------------------------------------------------------------*/ +/* USER CODE BEGIN ET */ + +/* USER CODE END ET */ + +extern TX_SEMAPHORE sd_tx_semaphore; +extern TX_SEMAPHORE sd_rx_semaphore; + +/* Exported constants --------------------------------------------------------*/ +/* USER CODE BEGIN EC */ + +/* USER CODE END EC */ +/* Default timeout used to wait for fx operations */ +#define FX_STM32_SD_DEFAULT_TIMEOUT (10 * TX_TIMER_TICKS_PER_SECOND) + +/* let the filex low-level driver initialize the SD driver */ +#define FX_STM32_SD_INIT 0 + +/* Enable the cache maintenance, needed when using SD DMA + * and accessing buffers in cacheable area + */ +#define FX_STM32_SD_CACHE_MAINTENANCE 0 + +/* Use the SD DMA API */ +#define FX_STM32_SD_DMA_API 1 + +/* SDIO instance to be used by FileX */ +#define FX_STM32_SD_INSTANCE 0 + +/* Default sector size, used by the driver */ +#define FX_STM32_SD_DEFAULT_SECTOR_SIZE 512 + +/* Exported macro ------------------------------------------------------------*/ +/* USER CODE BEGIN EM */ + +/* USER CODE END EM */ + +/* Define the macro to get the current time in ticks */ +/* USER CODE BEGIN FX_STM32_SD_CURRENT_TIME_TX */ +#define FX_STM32_SD_CURRENT_TIME() tx_time_get() + +/* USER CODE END FX_STM32_SD_CURRENT_TIME_TX */ + +/* Macro called before initializing the SD driver + * e.g. create a semaphore used for transfer notification */ +/* USER CODE BEGIN FX_STM32_SD_PRE_INIT_TX */ + +#define FX_STM32_SD_PRE_INIT(_media_ptr) do { \ + if ((tx_semaphore_create(&sd_rx_semaphore, "sd rx transfer semaphore", 0) != TX_SUCCESS) || \ + (tx_semaphore_create(&sd_tx_semaphore, "sd tx transfer semaphore", 0) != TX_SUCCESS)) \ + { \ + _media_ptr->fx_media_driver_status = FX_IO_ERROR; \ + } \ + } while(0) + +/* USER CODE END FX_STM32_SD_PRE_INIT_TX */ + +/* Macro called after initializing the SD driver */ +/* USER CODE BEGIN FX_STM32_SD_POST_INIT */ + +#define FX_STM32_SD_POST_INIT(_media_ptr) + +/* USER CODE END FX_STM32_SD_POST_INIT */ + +/* Macro called after the SD deinit */ + +/* USER CODE BEGIN FX_STM32_SD_POST_DEINIT_TX */ + +#define FX_STM32_SD_POST_DEINIT(_media_ptr) do { \ + tx_semaphore_delete(&sd_rx_semaphore); \ + tx_semaphore_delete(&sd_tx_semaphore); \ + } while(0) + +/* USER CODE END FX_STM32_SD_POST_DEINIT_TX */ + +/* Macro called after the abort request */ +/* USER CODE BEGIN FX_STM32_SD_POST_ABORT */ + +#define FX_STM32_SD_POST_ABORT(_media_ptr) + +/* USER CODE END FX_STM32_SD_POST_ABORT */ + +/* Macro called before performing read operation */ +/* USER CODE BEGIN FX_STM32_SD_PRE_READ_TRANSFER_DMA */ + +#define FX_STM32_SD_PRE_READ_TRANSFER(_media_ptr) +/* USER CODE END FX_STM32_SD_PRE_READ_TRANSFER_DMA */ + +/* Macro called after performing read operation */ +/* USER CODE BEGIN FX_STM32_SD_POST_READ_TRANSFER_TX */ + +#define FX_STM32_SD_POST_READ_TRANSFER(_media_ptr) + +/* USER CODE END FX_STM32_SD_POST_READ_TRANSFER_TX */ + +/* Macro for read error handling */ +/* USER CODE BEGIN FX_STM32_SD_READ_TRANSFER_ERROR_TX */ + +#define FX_STM32_SD_READ_TRANSFER_ERROR(_status_) + +/* USER CODE END FX_STM32_SD_READ_TRANSFER_ERROR_TX */ + +/* Define how to notify about Read completion operation */ +/* USER CODE BEGIN FX_STM32_SD_READ_CPLT_NOTIFY_TX */ + +#define FX_STM32_SD_READ_CPLT_NOTIFY() do { \ + if(tx_semaphore_get(&sd_rx_semaphore, FX_STM32_SD_DEFAULT_TIMEOUT) != TX_SUCCESS) \ + { \ + return FX_IO_ERROR; \ + } \ + } while(0) + +/* USER CODE END FX_STM32_SD_READ_CPLT_NOTIFY_TX */ + +/* Define how to notify about write completion operation */ +/* USER CODE BEGIN FX_STM32_SD_WRITE_CPLT_NOTIFY_TX */ + +#define FX_STM32_SD_WRITE_CPLT_NOTIFY() do { \ + if(tx_semaphore_get(&sd_tx_semaphore, FX_STM32_SD_DEFAULT_TIMEOUT) != TX_SUCCESS) \ + { \ + return FX_IO_ERROR; \ + } \ + } while(0) + +/* USER CODE END FX_STM32_SD_WRITE_CPLT_NOTIFY_TX */ + +/* Macro called before performing write operation */ +/* USER CODE BEGIN FX_STM32_SD_PRE_WRITE_TRANSFER_TX */ + +#define FX_STM32_SD_PRE_WRITE_TRANSFER(_media_ptr) + +/* USER CODE END FX_STM32_SD_PRE_WRITE_TRANSFER_TX */ + +/* Macro called after performing write operation */ +/* USER CODE BEGIN FX_STM32_SD_POST_WRITE_TRANSFER */ + +#define FX_STM32_SD_POST_WRITE_TRANSFER(_media_ptr) + +/* USER CODE END FX_STM32_SD_POST_WRITE_TRANSFER */ + +/* Macro for write error handling */ +/* USER CODE BEGIN FX_STM32_SD_WRITE_TRANSFER_ERROR */ + +#define FX_STM32_SD_WRITE_TRANSFER_ERROR(_status_) + +/* USER CODE END FX_STM32_SD_WRITE_TRANFSER_ERROR */ + +/* Exported functions prototypes ---------------------------------------------*/ + +INT fx_stm32_sd_init(UINT instance); +INT fx_stm32_sd_deinit(UINT instance); + +INT fx_stm32_sd_get_status(UINT instance); + +INT fx_stm32_sd_read_blocks(UINT instance, UINT *buffer, UINT start_block, UINT total_blocks); +INT fx_stm32_sd_write_blocks(UINT instance, UINT *buffer, UINT start_block, UINT total_blocks); + +VOID fx_stm32_sd_driver(FX_MEDIA *media_ptr); + +/* USER CODE BEGIN EFP */ + +/* USER CODE END EFP */ + +/* Private defines -----------------------------------------------------------*/ +/* USER CODE BEGIN PD */ + +/* USER CODE END PD */ + +/* USER CODE BEGIN 1 */ + +/* USER CODE END 1 */ + +#ifdef __cplusplus +} +#endif + +#endif /* FX_STM32_SD_DRIVER_H */ diff --git a/common/stm32/template/fx_stm32_sd_driver_dma_standalone.h b/common/stm32/template/fx_stm32_sd_driver_dma_standalone.h new file mode 100644 index 0000000..3516d96 --- /dev/null +++ b/common/stm32/template/fx_stm32_sd_driver_dma_standalone.h @@ -0,0 +1,197 @@ + +/**************************************************************************/ +/* */ +/* Copyright (c) Microsoft Corporation. All rights reserved. */ +/* */ +/* This software is licensed under the Microsoft Software License */ +/* Terms for Microsoft Azure RTOS. Full text of the license can be */ +/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ +/* and in the root directory of this software. */ +/* */ +/**************************************************************************/ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef FX_STM32_SD_DRIVER_H +#define FX_STM32_SD_DRIVER_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "fx_api.h" + +#include "stm32NNxx_hal.h" +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* Exported types ------------------------------------------------------------*/ +/* USER CODE BEGIN ET */ + +/* USER CODE END ET */ + +extern __IO UINT sd_rx_cplt; +extern __IO UINT sd_tx_cplt; + +/* Exported constants --------------------------------------------------------*/ +/* USER CODE BEGIN EC */ + +/* USER CODE END EC */ +/* Default timeout used to wait for fx operations */ +#define FX_STM32_SD_DEFAULT_TIMEOUT (10 * 1000) + +/* let the filex low-level driver initialize the SD driver */ +#define FX_STM32_SD_INIT 0 + +/* Enable the cache maintenance, needed when using SD DMA + * and accessing buffers in cacheable area + */ +#define FX_STM32_SD_CACHE_MAINTENANCE 0 + +/* Use the SD DMA API */ +#define FX_STM32_SD_DMA_API 1 + +/* SDIO instance to be used by FileX */ +#define FX_STM32_SD_INSTANCE 0 + +/* Default sector size, used by the driver */ +#define FX_STM32_SD_DEFAULT_SECTOR_SIZE 512 + +/* Exported macro ------------------------------------------------------------*/ +/* USER CODE BEGIN EM */ + +/* USER CODE END EM */ + +/* Define the macro to get the current time in ticks */ +/* USER CODE BEGIN FX_STM32_SD_CURRENT_TIME_TX */ +#define FX_STM32_SD_CURRENT_TIME() HAL_GetTick() + +/* USER CODE END FX_STM32_SD_CURRENT_TIME_TX */ + +/* Macro called before initializing the SD driver + * e.g. create a semaphore used for transfer notification */ + +/* USER CODE BEGIN FX_STM32_SD_PRE_INIT */ + +#define FX_STM32_SD_PRE_INIT(_media_ptr) + + /* USER CODE END FX_STM32_SD_PRE_INIT*/ + +/* Macro called after initializing the SD driver */ +/* USER CODE BEGIN FX_STM32_SD_POST_INIT */ + +#define FX_STM32_SD_POST_INIT(_media_ptr) + +/* USER CODE END FX_STM32_SD_POST_INIT */ + +/* Macro called after the SD deinit */ + +/* Macro called after the SD deinit */ +/* USER CODE BEGIN FX_STM32_SD_POST_DEINIT */ + +/* Macro called after the SD deinit */ +#define FX_STM32_SD_POST_DEINIT(_media_ptr) + +/* USER CODE END FX_STM32_SD_POST_DEINIT */ + +/* Macro called after the abort request */ +/* USER CODE BEGIN FX_STM32_SD_POST_ABORT */ + +#define FX_STM32_SD_POST_ABORT(_media_ptr) + +/* USER CODE END FX_STM32_SD_POST_ABORT */ + +/* Macro called before performing read operation */ +/* USER CODE BEGIN FX_STM32_SD_PRE_READ_TRANSFER */ + +/* Macro called before performing read operation */ +#define FX_STM32_SD_PRE_READ_TRANSFER(_media_ptr) + +/* USER CODE END FX_STM32_SD_PRE_READ_TRANSFER */ + +/* Macro called after performing read operation */ +/* USER CODE BEGIN FX_STM32_SD_POST_READ_TRANSFER */ + +/* Macro called after performing read operation */ +#define FX_STM32_SD_POST_READ_TRANSFER(_media_ptr) + +/* USER CODE END FX_STM32_SD_POST_READ_TRANSFER */ + +/* Macro for read error handling */ +/* USER CODE BEGIN FX_STM32_SD_READ_TRANSFER_ERROR */ + +/* Macro for read error handling */ +#define FX_STM32_SD_READ_TRANSFER_ERROR(_status_) + +/* USER CODE END FX_STM32_SD_READ_TRANSFER_ERROR */ + +/* Define how to notify about Read completion operation */ +/* USER CODE BEGIN FX_STM32_SD_READ_CPLT_NOTIFY */ + +/* Define how to notify about Read completion operation */ +#define FX_STM32_SD_READ_CPLT_NOTIFY() + +/* USER CODE END FX_STM32_SD_READ_CPLT_NOTIFY */ + +/* Define how to notify about write completion operation */ +/* USER CODE BEGIN FX_STM32_SD_WRITE_CPLT_NOTIFY */ + +/* Define how to notify about write completion operation */ +#define FX_STM32_SD_WRITE_CPLT_NOTIFY() + +/* USER CODE END FX_STM32_SD_WRITE_CPLT_NOTIFY */ + +/* Macro called before performing write operation */ +/* USER CODE BEGIN FX_STM32_SD_PRE_WRITE_TRANSFER */ + +/* Macro called before performing write operation */ +#define FX_STM32_SD_PRE_WRITE_TRANSFER(__media_ptr__) + +/* USER CODE END FX_STM32_SD_PRE_WRITE_TRANSFER */ + +/* Macro called after performing write operation */ +/* USER CODE BEGIN FX_STM32_SD_POST_WRITE_TRANSFER */ + +#define FX_STM32_SD_POST_WRITE_TRANSFER(_media_ptr) + +/* USER CODE END FX_STM32_SD_POST_WRITE_TRANSFER */ + +/* Macro for write error handling */ +/* USER CODE BEGIN FX_STM32_SD_WRITE_TRANSFER_ERROR */ + +/* Macro for write error handling */ +#define FX_STM32_SD_WRITE_TRANSFER_ERROR(__status__) + +/* USER CODE END FX_STM32_SD_WRITE_TRANFSER_ERROR */ + +/* Exported functions prototypes ---------------------------------------------*/ + +INT fx_stm32_sd_init(UINT instance); +INT fx_stm32_sd_deinit(UINT instance); + +INT fx_stm32_sd_get_status(UINT instance); + +INT fx_stm32_sd_read_blocks(UINT instance, UINT *buffer, UINT start_block, UINT total_blocks); +INT fx_stm32_sd_write_blocks(UINT instance, UINT *buffer, UINT start_block, UINT total_blocks); + +VOID fx_stm32_sd_driver(FX_MEDIA *media_ptr); + +/* USER CODE BEGIN EFP */ + +/* USER CODE END EFP */ + +/* Private defines -----------------------------------------------------------*/ +/* USER CODE BEGIN PD */ + +/* USER CODE END PD */ + +/* USER CODE BEGIN 1 */ + +/* USER CODE END 1 */ + +#ifdef __cplusplus +} +#endif + +#endif /* FX_STM32_SD_DRIVER_H */ diff --git a/common/stm32/template/fx_stm32_sd_driver_glue.c b/common/stm32/template/fx_stm32_sd_driver_glue.c new file mode 100644 index 0000000..26e529f --- /dev/null +++ b/common/stm32/template/fx_stm32_sd_driver_glue.c @@ -0,0 +1,95 @@ +/**************************************************************************/ +/* */ +/* Copyright (c) Microsoft Corporation. All rights reserved. */ +/* */ +/* This software is licensed under the Microsoft Software License */ +/* Terms for Microsoft Azure RTOS. Full text of the license can be */ +/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ +/* and in the root directory of this software. */ +/* */ +/**************************************************************************/ + +#include "fx_stm32_sd_driver.h" + +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ + +/** +* @brief Initializes the SD IP instance +* @param uINT Instance SD instance to initialize +* @retval 0 on success error value otherwise +*/ +INT fx_stm32_sd_init(UINT instance) +{ + INT ret = 0; +/* USER CODE BEGIN FX_SD_INIT */ + +/* USER CODE END FX_SD_INIT */ + + return ret; +} + +/** +* @brief Deinitializes the SD IP instance +* @param uINT Instance SD instance to deinitialize +* @retval 0 on success error value otherwise +*/ +INT fx_stm32_sd_deinit(UINT instance) +{ + INT ret = 0; +/* USER CODE BEGIN FX_SD_DEINIT */ + +/* USER CODE END FX_SD_DEINIT */ + + return ret; +} + +/** +* @brief Check the SD IP status. +* @param uINT Instance SD instance to check +* @retval 0 when ready 1 when busy +*/ +INT fx_stm32_sd_get_status(UINT instance) +{ + INT ret = 0; +/* USER CODE BEGIN GET_STATUS */ + +/* USER CODE END GET_STATUS */ + return ret; +} +/** +* @param UINT instance SD IP instance to read from. +* @param UINT *buffer buffer into which the data is to be read. +* @param UINT start_block the first block to start reading from. +* @param UINT total_blocks total number of blocks to read. +*/ +INT fx_stm32_sd_read_blocks(UINT instance, UINT *buffer, UINT start_block, UINT total_blocks) +{ + INT ret = 0; +/* USER CODE BEGIN READ_BLOCKS */ + +/* USER CODE END READ_BLOCKS */ + return ret; +} +/** +* @brief Write data buffer into the SD device. +* @param uINT *Buffer buffer .to write into the SD device. +* @param uINT StartBlock the first block to start writing from. +* @param uINT NbrOfBlocks total number of blocks to write. +* @retval 0 on success error code otherwise +*/ + +INT fx_stm32_sd_write_blocks(UINT instance, UINT *buffer, UINT start_block, UINT total_blocks) +{ + INT ret = 0; +/* USER CODE BEGIN WRITE_BLOCKS */ + +/* USER CODE END WRITE_BLOCKS */ + return ret; + +} + +/* USER CODE BEGIN 1 */ + +/* USER CODE END 1 */ diff --git a/common/stm32/template/fx_stm32_sd_driver_glue_dma_rtos.c b/common/stm32/template/fx_stm32_sd_driver_glue_dma_rtos.c new file mode 100644 index 0000000..4d9f7b8 --- /dev/null +++ b/common/stm32/template/fx_stm32_sd_driver_glue_dma_rtos.c @@ -0,0 +1,193 @@ +/**************************************************************************/ +/* */ +/* Copyright (c) Microsoft Corporation. All rights reserved. */ +/* */ +/* This software is licensed under the Microsoft Software License */ +/* Terms for Microsoft Azure RTOS. Full text of the license can be */ +/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ +/* and in the root directory of this software. */ +/* */ +/**************************************************************************/ + +#include "fx_stm32_sd_driver.h" + +TX_SEMAPHORE sd_tx_semaphore; +TX_SEMAPHORE sd_rx_semaphore; + +extern SD_HandleTypeDef hsd1; +#if (FX_STM32_SD_INIT == 1) +extern void MX_SDMMC1_SD_Init(void); +#endif + +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ + +/** +* @brief Initializes the SD IP instance +* @param UINT instance SD instance to initialize +* @retval 0 on success error value otherwise +*/ +INT fx_stm32_sd_init(UINT instance) +{ + INT ret = 0; + + /* USER CODE BEGIN PRE_FX_SD_INIT */ + UNUSED(instance); + /* USER CODE END PRE_FX_SD_INIT */ + +#if (FX_STM32_SD_INIT == 1) + MX_SDMMC1_SD_Init(); +#endif + + /* USER CODE BEGIN POST_FX_SD_INIT */ + + /* USER CODE END POST_FX_SD_INIT */ + + return ret; +} + +/** +* @brief Deinitializes the SD IP instance +* @param UINT instance SD instance to deinitialize +* @retval 0 on success error value otherwise +*/ +INT fx_stm32_sd_deinit(UINT instance) +{ + INT ret = 0; + + /* USER CODE BEGIN PRE_FX_SD_DEINIT */ + UNUSED(instance); + /* USER CODE END PRE_FX_SD_DEINIT */ + + if(HAL_SD_DeInit(&hsd1) != HAL_OK) + { + ret = 1; + } + + /* USER CODE BEGIN POST_FX_SD_DEINIT */ + + /* USER CODE END POST_FX_SD_DEINIT */ + + return ret; +} + +/** +* @brief Check the SD IP status. +* @param UINT instance SD instance to check +* @retval 0 when ready 1 when busy +*/ +INT fx_stm32_sd_get_status(UINT instance) +{ + INT ret = 0; + + /* USER CODE BEGIN PRE_GET_STATUS */ + UNUSED(instance); + /* USER CODE END PRE_GET_STATUS */ + + if(HAL_SD_GetCardState(&hsd1) != HAL_SD_CARD_TRANSFER) + { + ret = 1; + } + + /* USER CODE BEGIN POST_GET_STATUS */ + + /* USER CODE END POST_GET_STATUS */ + + return ret; +} + +/** +* @brief Read Data from the SD device into a buffer. +* @param UINT instance SD IP instance to read from. +* @param UINT *buffer buffer into which the data is to be read. +* @param UINT start_block the first block to start reading from. +* @param UINT total_blocks total number of blocks to read. +* @retval 0 on success error code otherwise +*/ +INT fx_stm32_sd_read_blocks(UINT instance, UINT *buffer, UINT start_block, UINT total_blocks) +{ + INT ret = 0; + + /* USER CODE BEGIN PRE_READ_BLOCKS */ + /* USER CODE END PRE_READ_BLOCKS */ + + if(HAL_SD_ReadBlocks_DMA(&hsd1, (uint8_t *)buffer, start_block, total_blocks) != HAL_OK) + { + ret = 1; + } + + /* USER CODE BEGIN POST_READ_BLOCKS */ + + /* USER CODE END POST_READ_BLOCKS */ + + return ret; +} + +/** +* @brief Write data buffer into the SD device. +* @param UINT instance SD IP instance to write into. +* @param UINT *buffer buffer to write into the SD device. +* @param UINT start_block the first block to start writing into. +* @param UINT total_blocks total number of blocks to write. +* @retval 0 on success error code otherwise +*/ +INT fx_stm32_sd_write_blocks(UINT instance, UINT *buffer, UINT start_block, UINT total_blocks) +{ + INT ret = 0; + + /* USER CODE BEGIN PRE_WRITE_BLOCKS */ + /* USER CODE END PRE_WRITE_BLOCKS */ + + if(HAL_SD_WriteBlocks_DMA(&hsd1, (uint8_t *)buffer, start_block, total_blocks) != HAL_OK) + { + ret = 1; + } + + /* USER CODE BEGIN POST_WRITE_BLOCKS */ + + /* USER CODE END POST_WRITE_BLOCKS */ + + return ret; +} + +/** +* @brief SD DMA Tx Transfer completed callbacks +* @param Instance the sd instance +* @retval None +*/ +void HAL_SD_TxCpltCallback(SD_HandleTypeDef *hsd) +{ + /* USER CODE BEGIN PRE_TX_CMPLT */ + + /* USER CODE END PRE_TX_CMPLT */ + + tx_semaphore_put(&sd_tx_semaphore); + + /* USER CODE BEGIN POST_TX_CMPLT */ + + /* USER CODE END POST_TX_CMPLT */ +} + +/** +* @brief SD DMA Rx Transfer completed callbacks +* @param Instance the sd instance +* @retval None +*/ +void HAL_SD_RxCpltCallback(SD_HandleTypeDef *hsd) +{ + + /* USER CODE BEGIN PRE_RX_CMPLT */ + + /* USER CODE END PRE_RX_CMPLT */ + + tx_semaphore_put(&sd_rx_semaphore); + + /* USER CODE BEGIN POST_RX_CMPLT */ + + /* USER CODE END POST_RX_CMPLT */ +} + +/* USER CODE BEGIN 1 */ + +/* USER CODE END 1 */ diff --git a/common/stm32/template/fx_stm32_sd_driver_glue_dma_standalone.c b/common/stm32/template/fx_stm32_sd_driver_glue_dma_standalone.c new file mode 100644 index 0000000..53215b3 --- /dev/null +++ b/common/stm32/template/fx_stm32_sd_driver_glue_dma_standalone.c @@ -0,0 +1,196 @@ +/**************************************************************************/ +/* */ +/* Copyright (c) Microsoft Corporation. All rights reserved. */ +/* */ +/* This software is licensed under the Microsoft Software License */ +/* Terms for Microsoft Azure RTOS. Full text of the license can be */ +/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ +/* and in the root directory of this software. */ +/* */ +/**************************************************************************/ + +#include "fx_stm32_sd_driver.h" + +extern SD_HandleTypeDef hsd1; +#if (FX_STM32_SD_INIT == 1) +extern void MX_SDMMC1_SD_Init(void); +#endif + +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ + +__IO UINT sd_rx_cplt; +__IO UINT sd_tx_cplt; + +/** +* @brief Initializes the SD IP instance +* @param UINT instance SD instance to initialize +* @retval 0 on success error value otherwise +*/ +INT fx_stm32_sd_init(UINT instance) +{ + INT ret = 0; + + /* USER CODE BEGIN PRE_FX_SD_INIT */ + UNUSED(instance); + /* USER CODE END PRE_FX_SD_INIT */ + +#if (FX_STM32_SD_INIT == 1) + MX_SDMMC1_SD_Init(); +#endif + + /* USER CODE BEGIN POST_FX_SD_INIT */ + + /* USER CODE END POST_FX_SD_INIT */ + + return ret; +} + +/** +* @brief Deinitializes the SD IP instance +* @param UINT instance SD instance to deinitialize +* @retval 0 on success error value otherwise +*/ +INT fx_stm32_sd_deinit(UINT instance) +{ + INT ret = 0; + + /* USER CODE BEGIN PRE_FX_SD_DEINIT */ + UNUSED(instance); + /* USER CODE END PRE_FX_SD_DEINIT */ + + if(HAL_SD_DeInit(&hsd1) != HAL_OK) + { + ret = 1; + } + + /* USER CODE BEGIN POST_FX_SD_DEINIT */ + + /* USER CODE END POST_FX_SD_DEINIT */ + + return ret; +} + +/** +* @brief Check the SD IP status. +* @param UINT instance SD instance to check +* @retval 0 when ready 1 when busy +*/ +INT fx_stm32_sd_get_status(UINT instance) +{ + INT ret = 0; + + /* USER CODE BEGIN PRE_GET_STATUS */ + UNUSED(instance); + /* USER CODE END PRE_GET_STATUS */ + + if(HAL_SD_GetCardState(&hsd1) != HAL_SD_CARD_TRANSFER) + { + ret = 1; + } + + /* USER CODE BEGIN POST_GET_STATUS */ + + /* USER CODE END POST_GET_STATUS */ + + return ret; +} + +/** +* @brief Read Data from the SD device into a buffer. +* @param UINT instance SD IP instance to read from. +* @param UINT *buffer buffer into which the data is to be read. +* @param UINT start_block the first block to start reading from. +* @param UINT total_blocks total number of blocks to read. +* @retval 0 on success error code otherwise +*/ +INT fx_stm32_sd_read_blocks(UINT instance, UINT *buffer, UINT start_block, UINT total_blocks) +{ + INT ret = 0; + + /* USER CODE BEGIN PRE_READ_BLOCKS */ + /* USER CODE END PRE_READ_BLOCKS */ + sd_rx_cplt = 0; + + if(HAL_SD_ReadBlocks_DMA(&hsd1, (uint8_t *)buffer, start_block, total_blocks) != HAL_OK) + { + ret = 1; + } + + /* USER CODE BEGIN POST_READ_BLOCKS */ + + /* USER CODE END POST_READ_BLOCKS */ + + return ret; +} + +/** +* @brief Write data buffer into the SD device. +* @param UINT instance SD IP instance to write into. +* @param UINT *buffer buffer to write into the SD device. +* @param UINT start_block the first block to start writing into. +* @param UINT total_blocks total number of blocks to write. +* @retval 0 on success error code otherwise +*/ +INT fx_stm32_sd_write_blocks(UINT instance, UINT *buffer, UINT start_block, UINT total_blocks) +{ + INT ret = 0; + + /* USER CODE BEGIN PRE_WRITE_BLOCKS */ + /* USER CODE END PRE_WRITE_BLOCKS */ + + sd_tx_cplt = 0; + + if(HAL_SD_WriteBlocks_DMA(&hsd1, (uint8_t *)buffer, start_block, total_blocks) != HAL_OK) + { + ret = 1; + } + + /* USER CODE BEGIN POST_WRITE_BLOCKS */ + + /* USER CODE END POST_WRITE_BLOCKS */ + + return ret; +} + +/** +* @brief SD DMA Tx Transfer completed callbacks +* @param SD_HandleTypeDef *hsd the SD_HandleTypeDef handle +* @retval None +*/ +void HAL_SD_TxCpltCallback(SD_HandleTypeDef *hsd) +{ +/* USER CODE BEGIN TX_COMPLETED_0 */ + +/* USER CODE END TX_COMPLETED_0 */ + + sd_tx_cplt = 1; + +/* USER CODE BEGIN TX_COMPLETED_1 */ + +/* USER CODE END TX_COMPLETED_1 */ + +} + +/** +* @brief SD DMA Rx Transfer completed callbacks +* @param SD_HandleTypeDef *hsd the SD_HandleTypeDef handle +* @retval None +*/ +void HAL_SD_RxCpltCallback(SD_HandleTypeDef *hsd) +{ + /* USER CODE BEGIN RX_COMPLETED_0 */ + +/* USER CODE END RX_COMPLETED_0 */ + sd_rx_cplt = 1; + +/* USER CODE BEGIN RX_COMPLETED_1 */ + +/* USER CODE END RX_COMPLETED_1 */ + +} + +/* USER CODE BEGIN 1 */ + +/* USER CODE END 1 */ diff --git a/common/stm32/template/fx_stm32_sram_driver.h b/common/stm32/template/fx_stm32_sram_driver.h new file mode 100644 index 0000000..f5b2567 --- /dev/null +++ b/common/stm32/template/fx_stm32_sram_driver.h @@ -0,0 +1,71 @@ + +/**************************************************************************/ +/* */ +/* Copyright (c) Microsoft Corporation. All rights reserved. */ +/* */ +/* This software is licensed under the Microsoft Software License */ +/* Terms for Microsoft Azure RTOS. Full text of the license can be */ +/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ +/* and in the root directory of this software. */ +/* */ +/**************************************************************************/ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef FX_STM32_SRAM_DRIVER_H +#define FX_STM32_SRAM_DRIVER_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "fx_api.h" + +#include "stm32XXXX.h" +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* Exported types ------------------------------------------------------------*/ +/* USER CODE BEGIN ET */ + +/* USER CODE END ET */ + +/* Exported constants --------------------------------------------------------*/ + +#define FX_SRAM_DISK_BASE_ADDRESS D1_AXISRAM_BASE + +/* define the SRAM DISK size */ +#define FX_SRAM_DISK_SIZE (32 * 1024) + + +/* USER CODE BEGIN EC */ + +/* USER CODE END EC */ + +/* Exported macro ------------------------------------------------------------*/ +/* USER CODE BEGIN EM */ + +/* USER CODE END EM */ + +/* Exported functions prototypes ---------------------------------------------*/ + +VOID fx_stm32_ram_driver(FX_MEDIA *media_ptr); + +/* USER CODE BEGIN EFP */ + +/* USER CODE END EFP */ + +/* Private defines -----------------------------------------------------------*/ +/* USER CODE BEGIN PD */ + +/* USER CODE END PD */ + +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ + +#ifdef __cplusplus +} +#endif +#endif /* FX_STM32_SRAM_DRIVER_H */ From 9f1f4834c6bdb55e15ce1e04aa807fbd32efc2d1 Mon Sep 17 00:00:00 2001 From: Stefan Wick Date: Fri, 14 Feb 2025 14:34:08 -0800 Subject: [PATCH 2/2] update copyright headers to reflect MIT license --- common/stm32/fx_stm32_levelx_nand_driver.c | 20 +++++++++--------- common/stm32/fx_stm32_levelx_nor_driver.c | 19 ++++++++--------- common/stm32/fx_stm32_mmc_driver.c | 20 ++++++++---------- common/stm32/fx_stm32_sd_driver.c | 20 ++++++++---------- common/stm32/fx_stm32_sram_driver.c | 21 ++++++++----------- .../template/fx_stm32_levelx_nand_driver.h | 19 ++++++++--------- .../template/fx_stm32_levelx_nor_driver.h | 19 ++++++++--------- common/stm32/template/fx_stm32_mmc_driver.h | 20 ++++++++---------- .../stm32/template/fx_stm32_mmc_driver_glue.c | 19 ++++++++--------- common/stm32/template/fx_stm32_sd_driver.h | 20 ++++++++---------- .../template/fx_stm32_sd_driver_dma_rtos.h | 20 ++++++++---------- .../fx_stm32_sd_driver_dma_standalone.h | 20 ++++++++---------- .../stm32/template/fx_stm32_sd_driver_glue.c | 19 ++++++++--------- .../fx_stm32_sd_driver_glue_dma_rtos.c | 19 ++++++++--------- .../fx_stm32_sd_driver_glue_dma_standalone.c | 19 ++++++++--------- common/stm32/template/fx_stm32_sram_driver.h | 20 ++++++++---------- 16 files changed, 145 insertions(+), 169 deletions(-) diff --git a/common/stm32/fx_stm32_levelx_nand_driver.c b/common/stm32/fx_stm32_levelx_nand_driver.c index bc14c51..2ae4b49 100644 --- a/common/stm32/fx_stm32_levelx_nand_driver.c +++ b/common/stm32/fx_stm32_levelx_nand_driver.c @@ -1,13 +1,13 @@ -/**************************************************************************/ -/* */ -/* Copyright (c) Microsoft Corporation. All rights reserved. */ -/* */ -/* This software is licensed under the Microsoft Software License */ -/* Terms for Microsoft Azure RTOS. Full text of the license can be */ -/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ -/* and in the root directory of this software. */ -/* */ -/**************************************************************************/ +/*************************************************************************** + * Copyright (c) 2024 Microsoft Corporation + * + * This program and the accompanying materials are made available under the + * terms of the MIT License which is available at + * https://opensource.org/licenses/MIT. + * + * SPDX-License-Identifier: MIT + **************************************************************************/ + #include "fx_stm32_levelx_nand_driver.h" diff --git a/common/stm32/fx_stm32_levelx_nor_driver.c b/common/stm32/fx_stm32_levelx_nor_driver.c index 09a6dc5..4c63575 100644 --- a/common/stm32/fx_stm32_levelx_nor_driver.c +++ b/common/stm32/fx_stm32_levelx_nor_driver.c @@ -1,13 +1,12 @@ -/**************************************************************************/ -/* */ -/* Copyright (c) Microsoft Corporation. All rights reserved. */ -/* */ -/* This software is licensed under the Microsoft Software License */ -/* Terms for Microsoft Azure RTOS. Full text of the license can be */ -/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ -/* and in the root directory of this software. */ -/* */ -/**************************************************************************/ +/*************************************************************************** + * Copyright (c) 2024 Microsoft Corporation + * + * This program and the accompanying materials are made available under the + * terms of the MIT License which is available at + * https://opensource.org/licenses/MIT. + * + * SPDX-License-Identifier: MIT + **************************************************************************/ #include "fx_stm32_levelx_nor_driver.h" diff --git a/common/stm32/fx_stm32_mmc_driver.c b/common/stm32/fx_stm32_mmc_driver.c index a4ce23a..0612276 100644 --- a/common/stm32/fx_stm32_mmc_driver.c +++ b/common/stm32/fx_stm32_mmc_driver.c @@ -1,14 +1,12 @@ -/**************************************************************************/ -/* */ -/* Partial Copyright (c) Microsoft Corporation. All rights reserved.*/ -/* */ -/* This software is licensed under the Microsoft Software License */ -/* Terms for Microsoft Azure RTOS. Full text of the license can be */ -/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ -/* and in the root directory of this software. */ -/* Partial Copyright (c) STMicroelctronics 2020. All rights reserved */ -/**************************************************************************/ - +/*************************************************************************** + * Copyright (c) 2024 Microsoft Corporation + * + * This program and the accompanying materials are made available under the + * terms of the MIT License which is available at + * https://opensource.org/licenses/MIT. + * + * SPDX-License-Identifier: MIT + **************************************************************************/ /* Include necessary system files. */ #include "fx_stm32_mmc_driver.h" diff --git a/common/stm32/fx_stm32_sd_driver.c b/common/stm32/fx_stm32_sd_driver.c index 94bc5d1..68298fc 100644 --- a/common/stm32/fx_stm32_sd_driver.c +++ b/common/stm32/fx_stm32_sd_driver.c @@ -1,14 +1,12 @@ -/**************************************************************************/ -/* */ -/* Partial Copyright (c) Microsoft Corporation. All rights reserved.*/ -/* */ -/* This software is licensed under the Microsoft Software License */ -/* Terms for Microsoft Azure RTOS. Full text of the license can be */ -/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ -/* and in the root directory of this software. */ -/* Partial Copyright (c) STMicroelctronics 2020. All rights reserved */ -/**************************************************************************/ - +/*************************************************************************** + * Copyright (c) 2024 Microsoft Corporation + * + * This program and the accompanying materials are made available under the + * terms of the MIT License which is available at + * https://opensource.org/licenses/MIT. + * + * SPDX-License-Identifier: MIT + **************************************************************************/ /* Include necessary system files. */ #include "fx_stm32_sd_driver.h" diff --git a/common/stm32/fx_stm32_sram_driver.c b/common/stm32/fx_stm32_sram_driver.c index 5c00444..a8d0d2c 100644 --- a/common/stm32/fx_stm32_sram_driver.c +++ b/common/stm32/fx_stm32_sram_driver.c @@ -1,15 +1,12 @@ - -/**************************************************************************/ -/* */ -/* Copyright (c) Microsoft Corporation. All rights reserved. */ -/* */ -/* This software is licensed under the Microsoft Software License */ -/* Terms for Microsoft Azure RTOS. Full text of the license can be */ -/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ -/* and in the root directory of this software. */ -/* */ -/**************************************************************************/ - +/*************************************************************************** + * Copyright (c) 2024 Microsoft Corporation + * + * This program and the accompanying materials are made available under the + * terms of the MIT License which is available at + * https://opensource.org/licenses/MIT. + * + * SPDX-License-Identifier: MIT + **************************************************************************/ /**************************************************************************/ /**************************************************************************/ diff --git a/common/stm32/template/fx_stm32_levelx_nand_driver.h b/common/stm32/template/fx_stm32_levelx_nand_driver.h index 7923fa4..d964702 100644 --- a/common/stm32/template/fx_stm32_levelx_nand_driver.h +++ b/common/stm32/template/fx_stm32_levelx_nand_driver.h @@ -1,13 +1,12 @@ -/**************************************************************************/ -/* */ -/* Copyright (c) Microsoft Corporation. All rights reserved. */ -/* */ -/* This software is licensed under the Microsoft Software License */ -/* Terms for Microsoft Azure RTOS. Full text of the license can be */ -/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ -/* and in the root directory of this software. */ -/* */ -/**************************************************************************/ +/*************************************************************************** + * Copyright (c) 2024 Microsoft Corporation + * + * This program and the accompanying materials are made available under the + * terms of the MIT License which is available at + * https://opensource.org/licenses/MIT. + * + * SPDX-License-Identifier: MIT + **************************************************************************/ /* Define to prevent recursive inclusion -------------------------------------*/ #ifndef FX_STM32_LX_NAND_DRIVER_H diff --git a/common/stm32/template/fx_stm32_levelx_nor_driver.h b/common/stm32/template/fx_stm32_levelx_nor_driver.h index fa07bfb..2222e24 100644 --- a/common/stm32/template/fx_stm32_levelx_nor_driver.h +++ b/common/stm32/template/fx_stm32_levelx_nor_driver.h @@ -1,13 +1,12 @@ -/**************************************************************************/ -/* */ -/* Copyright (c) Microsoft Corporation. All rights reserved. */ -/* */ -/* This software is licensed under the Microsoft Software License */ -/* Terms for Microsoft Azure RTOS. Full text of the license can be */ -/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ -/* and in the root directory of this software. */ -/* */ -/**************************************************************************/ +/*************************************************************************** + * Copyright (c) 2024 Microsoft Corporation + * + * This program and the accompanying materials are made available under the + * terms of the MIT License which is available at + * https://opensource.org/licenses/MIT. + * + * SPDX-License-Identifier: MIT + **************************************************************************/ /* Define to prevent recursive inclusion -------------------------------------*/ #ifndef FX_STM32_LX_NOR_DRIVER_H diff --git a/common/stm32/template/fx_stm32_mmc_driver.h b/common/stm32/template/fx_stm32_mmc_driver.h index faa02ba..9c0b199 100644 --- a/common/stm32/template/fx_stm32_mmc_driver.h +++ b/common/stm32/template/fx_stm32_mmc_driver.h @@ -1,14 +1,12 @@ - -/**************************************************************************/ -/* */ -/* Copyright (c) Microsoft Corporation. All rights reserved. */ -/* */ -/* This software is licensed under the Microsoft Software License */ -/* Terms for Microsoft Azure RTOS. Full text of the license can be */ -/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ -/* and in the root directory of this software. */ -/* */ -/**************************************************************************/ +/*************************************************************************** + * Copyright (c) 2024 Microsoft Corporation + * + * This program and the accompanying materials are made available under the + * terms of the MIT License which is available at + * https://opensource.org/licenses/MIT. + * + * SPDX-License-Identifier: MIT + **************************************************************************/ /* Define to prevent recursive inclusion -------------------------------------*/ #ifndef FX_STM32_MMC_DRIVER_H diff --git a/common/stm32/template/fx_stm32_mmc_driver_glue.c b/common/stm32/template/fx_stm32_mmc_driver_glue.c index 602eed4..debb0d0 100644 --- a/common/stm32/template/fx_stm32_mmc_driver_glue.c +++ b/common/stm32/template/fx_stm32_mmc_driver_glue.c @@ -1,13 +1,12 @@ -/**************************************************************************/ -/* */ -/* Copyright (c) Microsoft Corporation. All rights reserved. */ -/* */ -/* This software is licensed under the Microsoft Software License */ -/* Terms for Microsoft Azure RTOS. Full text of the license can be */ -/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ -/* and in the root directory of this software. */ -/* */ -/**************************************************************************/ +/*************************************************************************** + * Copyright (c) 2024 Microsoft Corporation + * + * This program and the accompanying materials are made available under the + * terms of the MIT License which is available at + * https://opensource.org/licenses/MIT. + * + * SPDX-License-Identifier: MIT + **************************************************************************/ #include "fx_stm32_mmc_driver.h" diff --git a/common/stm32/template/fx_stm32_sd_driver.h b/common/stm32/template/fx_stm32_sd_driver.h index a304663..4fd78cb 100644 --- a/common/stm32/template/fx_stm32_sd_driver.h +++ b/common/stm32/template/fx_stm32_sd_driver.h @@ -1,14 +1,12 @@ - -/**************************************************************************/ -/* */ -/* Copyright (c) Microsoft Corporation. All rights reserved. */ -/* */ -/* This software is licensed under the Microsoft Software License */ -/* Terms for Microsoft Azure RTOS. Full text of the license can be */ -/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ -/* and in the root directory of this software. */ -/* */ -/**************************************************************************/ +/*************************************************************************** + * Copyright (c) 2024 Microsoft Corporation + * + * This program and the accompanying materials are made available under the + * terms of the MIT License which is available at + * https://opensource.org/licenses/MIT. + * + * SPDX-License-Identifier: MIT + **************************************************************************/ /* Define to prevent recursive inclusion -------------------------------------*/ #ifndef FX_STM32_SD_DRIVER_H diff --git a/common/stm32/template/fx_stm32_sd_driver_dma_rtos.h b/common/stm32/template/fx_stm32_sd_driver_dma_rtos.h index dfc4ce3..bbb34a1 100644 --- a/common/stm32/template/fx_stm32_sd_driver_dma_rtos.h +++ b/common/stm32/template/fx_stm32_sd_driver_dma_rtos.h @@ -1,14 +1,12 @@ - -/**************************************************************************/ -/* */ -/* Copyright (c) Microsoft Corporation. All rights reserved. */ -/* */ -/* This software is licensed under the Microsoft Software License */ -/* Terms for Microsoft Azure RTOS. Full text of the license can be */ -/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ -/* and in the root directory of this software. */ -/* */ -/**************************************************************************/ +/*************************************************************************** + * Copyright (c) 2024 Microsoft Corporation + * + * This program and the accompanying materials are made available under the + * terms of the MIT License which is available at + * https://opensource.org/licenses/MIT. + * + * SPDX-License-Identifier: MIT + **************************************************************************/ /* Define to prevent recursive inclusion -------------------------------------*/ #ifndef FX_STM32_SD_DRIVER_H diff --git a/common/stm32/template/fx_stm32_sd_driver_dma_standalone.h b/common/stm32/template/fx_stm32_sd_driver_dma_standalone.h index 3516d96..6e2ed60 100644 --- a/common/stm32/template/fx_stm32_sd_driver_dma_standalone.h +++ b/common/stm32/template/fx_stm32_sd_driver_dma_standalone.h @@ -1,14 +1,12 @@ - -/**************************************************************************/ -/* */ -/* Copyright (c) Microsoft Corporation. All rights reserved. */ -/* */ -/* This software is licensed under the Microsoft Software License */ -/* Terms for Microsoft Azure RTOS. Full text of the license can be */ -/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ -/* and in the root directory of this software. */ -/* */ -/**************************************************************************/ +/*************************************************************************** + * Copyright (c) 2024 Microsoft Corporation + * + * This program and the accompanying materials are made available under the + * terms of the MIT License which is available at + * https://opensource.org/licenses/MIT. + * + * SPDX-License-Identifier: MIT + **************************************************************************/ /* Define to prevent recursive inclusion -------------------------------------*/ #ifndef FX_STM32_SD_DRIVER_H diff --git a/common/stm32/template/fx_stm32_sd_driver_glue.c b/common/stm32/template/fx_stm32_sd_driver_glue.c index 26e529f..d7b0732 100644 --- a/common/stm32/template/fx_stm32_sd_driver_glue.c +++ b/common/stm32/template/fx_stm32_sd_driver_glue.c @@ -1,13 +1,12 @@ -/**************************************************************************/ -/* */ -/* Copyright (c) Microsoft Corporation. All rights reserved. */ -/* */ -/* This software is licensed under the Microsoft Software License */ -/* Terms for Microsoft Azure RTOS. Full text of the license can be */ -/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ -/* and in the root directory of this software. */ -/* */ -/**************************************************************************/ +/*************************************************************************** + * Copyright (c) 2024 Microsoft Corporation + * + * This program and the accompanying materials are made available under the + * terms of the MIT License which is available at + * https://opensource.org/licenses/MIT. + * + * SPDX-License-Identifier: MIT + **************************************************************************/ #include "fx_stm32_sd_driver.h" diff --git a/common/stm32/template/fx_stm32_sd_driver_glue_dma_rtos.c b/common/stm32/template/fx_stm32_sd_driver_glue_dma_rtos.c index 4d9f7b8..790ba8d 100644 --- a/common/stm32/template/fx_stm32_sd_driver_glue_dma_rtos.c +++ b/common/stm32/template/fx_stm32_sd_driver_glue_dma_rtos.c @@ -1,13 +1,12 @@ -/**************************************************************************/ -/* */ -/* Copyright (c) Microsoft Corporation. All rights reserved. */ -/* */ -/* This software is licensed under the Microsoft Software License */ -/* Terms for Microsoft Azure RTOS. Full text of the license can be */ -/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ -/* and in the root directory of this software. */ -/* */ -/**************************************************************************/ +/*************************************************************************** + * Copyright (c) 2024 Microsoft Corporation + * + * This program and the accompanying materials are made available under the + * terms of the MIT License which is available at + * https://opensource.org/licenses/MIT. + * + * SPDX-License-Identifier: MIT + **************************************************************************/ #include "fx_stm32_sd_driver.h" diff --git a/common/stm32/template/fx_stm32_sd_driver_glue_dma_standalone.c b/common/stm32/template/fx_stm32_sd_driver_glue_dma_standalone.c index 53215b3..437f0ea 100644 --- a/common/stm32/template/fx_stm32_sd_driver_glue_dma_standalone.c +++ b/common/stm32/template/fx_stm32_sd_driver_glue_dma_standalone.c @@ -1,13 +1,12 @@ -/**************************************************************************/ -/* */ -/* Copyright (c) Microsoft Corporation. All rights reserved. */ -/* */ -/* This software is licensed under the Microsoft Software License */ -/* Terms for Microsoft Azure RTOS. Full text of the license can be */ -/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ -/* and in the root directory of this software. */ -/* */ -/**************************************************************************/ +/*************************************************************************** + * Copyright (c) 2024 Microsoft Corporation + * + * This program and the accompanying materials are made available under the + * terms of the MIT License which is available at + * https://opensource.org/licenses/MIT. + * + * SPDX-License-Identifier: MIT + **************************************************************************/ #include "fx_stm32_sd_driver.h" diff --git a/common/stm32/template/fx_stm32_sram_driver.h b/common/stm32/template/fx_stm32_sram_driver.h index f5b2567..ecf96a3 100644 --- a/common/stm32/template/fx_stm32_sram_driver.h +++ b/common/stm32/template/fx_stm32_sram_driver.h @@ -1,14 +1,12 @@ - -/**************************************************************************/ -/* */ -/* Copyright (c) Microsoft Corporation. All rights reserved. */ -/* */ -/* This software is licensed under the Microsoft Software License */ -/* Terms for Microsoft Azure RTOS. Full text of the license can be */ -/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ -/* and in the root directory of this software. */ -/* */ -/**************************************************************************/ +/*************************************************************************** + * Copyright (c) 2024 Microsoft Corporation + * + * This program and the accompanying materials are made available under the + * terms of the MIT License which is available at + * https://opensource.org/licenses/MIT. + * + * SPDX-License-Identifier: MIT + **************************************************************************/ /* Define to prevent recursive inclusion -------------------------------------*/ #ifndef FX_STM32_SRAM_DRIVER_H