diff --git a/docs/source/_static/images/charge_som_evb_x11_pinout.svg b/docs/source/_static/images/charge_som_evb_x11_pinout.svg new file mode 100644 index 0000000..f522e39 --- /dev/null +++ b/docs/source/_static/images/charge_som_evb_x11_pinout.svg @@ -0,0 +1,1686 @@ + + + + + + + + + + + + + + + + + + 1 + + + VDD IO 3V3 + + + + 3 + + + GND + + + 5 + + GPIO2 27 + + USDHC3 D3 + + CAN2 RX + + PWM6 CH3 + + + 7 + + GPIO2 26 + + USDHC3 D2 + + PWM5 CH3 + + + 9 + + GPIO3 26 + + + 11 + + GPIO3 27 + + + 13 + + GPIO2 11 + + SPI3 CLK + + UART7 RTS + + I2C8 SCL + + + 15 + + GPIO2 09 + + SPI3 MISO + + UART7 RX + + I2C7 SCL + + + 17 + + GPIO2 10 + + SPI3 MOSI + + UART7 CTS + + I2C8 SDA + + + 19 + + GPIO2 08 + + SPI3 CS0 + + UART7 TX + + I2C7 SDA + + PWM6 CH0 + + + + 2 + + + VCC 5V + + + + 4 + + + GND + + + + 6 + + + GPIO2 25 + + USDHC3 D1 + + CAN2 TX + + PWM4 CH3 + + + + 8 + + + GPIO2 23 + + USDHC3 CMD + + I2C5 SCL + + PWM6 CH1 + + + + 10 + + + GPIO2 22 + + USDHC3 CLK + + I2C5 SDA + + PWM5 CH1 + + + + 12 + + + GPIO3 21 + + USDHC3 CMD + + + + 14 + + + GPIO3 22 + + USDHC3 D0 + + + + 16 + + + GPIO3 23 + + USDHC3 D1 + + + + 18 + + + GPIO3 24 + + USDHC3 D2 + + + + 20 + + + GPIO3 25 + + USDHC3 D3 + + + + GPIO + + + + Ground + + + + I2C + + + + Power + + + + PWM + + + + SDIO + + + + SPI + + + + UART + + + + + + + + CAN + + diff --git a/docs/source/hardware.rst b/docs/source/hardware.rst index df16819..7a4e616 100644 --- a/docs/source/hardware.rst +++ b/docs/source/hardware.rst @@ -105,6 +105,166 @@ by EVerest's IMD interface. Wiring for Bender's IMD to Charge SOM EVB +*************** +Expansion (X11) +*************** + +The i.MX93 expansion header provides access to several hardware interfaces which are not used by the evaluation board +by default. These pins are routed directly to the NXP i.MX93, so several functions can be used on them. +The following graphic attempts to visualize the possible multiplexing options. +However, it only considers common ones, not all possible ones, to maintain clarity. + +.. figure:: _static/images/charge_som_evb_x11_pinout.svg + :alt: Pin Mux Options for the Signals of Expansion Connector (X11) + :width: 100% + + Pin Mux Options for the Signals of Expansion Connector (X11) + +The following table summarizes the same common interfaces and list the available DT overlays. +These overlays make the interfaces configuration very easy. But the actual possible combinations +still depend on the pinmuxing of these 16 pins! + ++---------------+------------------+-----------------------------------+-------------------------------------------+ +| Interface | Maximum possible | Available DT Overlay | Notes | ++===============+==================+===================================+===========================================+ +| SPI | 1 | | | ++---------------+------------------+-----------------------------------+-------------------------------------------+ +| I²C | 3 | | | ++---------------+------------------+-----------------------------------+-------------------------------------------+ +| UART [#]_ | 1 | - imx93-charge-som-uart7.dtso | without RTS/CTS | ++---------------+------------------+-----------------------------------+-------------------------------------------+ +| SDIO | 1 | | | ++---------------+------------------+-----------------------------------+-------------------------------------------+ +| CAN | 1 | | | ++---------------+------------------+-----------------------------------+-------------------------------------------+ +| PWM | 6 | | | ++---------------+------------------+-----------------------------------+-------------------------------------------+ +| GPIO | 16 | - imx93-charge-som-clko-gpio.dtso | Warning: short clock after power-up/reset | ++---------------+------------------+-----------------------------------+-------------------------------------------+ + +.. [#] The UART7 has RTS/CTS signals available. + +The following table indicates all possible muxing options for these signals. +By default, the factory shipped configuration for the Charge SOM EVB is that the signals GPIO3_26 and GPIO3_27 +are configured as GPIO via imx93-charge-som-clko-gpio.dtso . All other pins are left untouched by default. + ++---------------------------+---------------------------+------------------------------------------------------+----------------------+ +| Signal | Linux GPIO Line Name | Pad Mux Options | Notes | ++===========================+===========================+======================================================+======================+ +| CAN2_RX | X11_CAN2_RX | - MX93_PAD_GPIO_IO27__GPIO2_IO27 | | +| | | - MX93_PAD_GPIO_IO27__USDHC3_DATA3 | | +| | | - MX93_PAD_GPIO_IO27__CAN2_RX | | +| | | - MX93_PAD_GPIO_IO27__MEDIAMIX_DISP_DATA23 | | +| | | - MX93_PAD_GPIO_IO27__TPM6_CH3 | | +| | | - MX93_PAD_GPIO_IO27__JTAG_MUX_TMS | | +| | | - MX93_PAD_GPIO_IO27__LPSPI5_PCS1 | | +| | | - MX93_PAD_GPIO_IO27__FLEXIO1_FLEXIO27 | | ++---------------------------+---------------------------+------------------------------------------------------+----------------------+ +| CAN2_TX | X11_CAN2_TX | - MX93_PAD_GPIO_IO25__GPIO2_IO25 | | +| | | - MX93_PAD_GPIO_IO25__USDHC3_DATA1 | | +| | | - MX93_PAD_GPIO_IO25__CAN2_TX | | +| | | - MX93_PAD_GPIO_IO25__MEDIAMIX_DISP_DATA21 | | +| | | - MX93_PAD_GPIO_IO25__TPM4_CH3 | | +| | | - MX93_PAD_GPIO_IO25__JTAG_MUX_TCK | | +| | | - MX93_PAD_GPIO_IO25__LPSPI7_PCS1 | | +| | | - MX93_PAD_GPIO_IO25__FLEXIO1_FLEXIO25 | | ++---------------------------+---------------------------+------------------------------------------------------+----------------------+ +| PWM5_3 | X11_PWM5_3 | - MX93_PAD_GPIO_IO26__GPIO2_IO26 | | +| | | - MX93_PAD_GPIO_IO26__USDHC3_DATA2 | | +| | | - MX93_PAD_GPIO_IO26__PDM_BIT_STREAM01 | | +| | | - MX93_PAD_GPIO_IO26__MEDIAMIX_DISP_DATA22 | | +| | | - MX93_PAD_GPIO_IO26__TPM5_CH3 | | +| | | - MX93_PAD_GPIO_IO26__JTAG_MUX_TDI | | +| | | - MX93_PAD_GPIO_IO26__LPSPI8_PCS1 | | +| | | - MX93_PAD_GPIO_IO26__SAI3_TX_SYNC | | ++---------------------------+---------------------------+------------------------------------------------------+----------------------+ +| GPIO_IO23/I2C5_SCL | X11_I2C5_SCL | - MX93_PAD_GPIO_IO23__GPIO2_IO23 | | +| | | - MX93_PAD_GPIO_IO23__USDHC3_CMD | | +| | | - MX93_PAD_GPIO_IO23__SPDIF_OUT | | +| | | - MX93_PAD_GPIO_IO23__MEDIAMIX_DISP_DATA19 | | +| | | - MX93_PAD_GPIO_IO23__TPM6_CH1 | | +| | | - MX93_PAD_GPIO_IO23__LPI2C5_SCL | | +| | | - MX93_PAD_GPIO_IO23__FLEXIO1_FLEXIO23 | | ++---------------------------+---------------------------+------------------------------------------------------+----------------------+ +| GPIO3_26 | X11_GPIO3_26 | - MX93_PAD_CCM_CLKO1__CCMSRCGPCMIX_CLKO1 | Warning: clock | +| | | - MX93_PAD_CCM_CLKO1__FLEXIO1_FLEXIO26 | output after | +| | | - MX93_PAD_CCM_CLKO1__GPIO3_IO26 | power-up/reset | ++---------------------------+---------------------------+------------------------------------------------------+----------------------+ +| SD3_CLK/I2C5_SDA | X11_I2C5_SDA | - MX93_PAD_GPIO_IO22__GPIO2_IO22 | | +| | | - MX93_PAD_GPIO_IO22__USDHC3_CLK | | +| | | - MX93_PAD_GPIO_IO22__SPDIF_IN | | +| | | - MX93_PAD_GPIO_IO22__MEDIAMIX_DISP_DATA18 | | +| | | - MX93_PAD_GPIO_IO22__TPM5_CH1 | | +| | | - MX93_PAD_GPIO_IO22__TPM6_EXTCLK | | +| | | - MX93_PAD_GPIO_IO22__LPI2C5_SDA | | +| | | - MX93_PAD_GPIO_IO22__FLEXIO1_FLEXIO22 | | ++---------------------------+---------------------------+------------------------------------------------------+----------------------+ +| GPIO3_27 | X11_GPIO3_27 | - MX93_PAD_CCM_CLKO2__GPIO3_IO27 | Warning: clock | +| | | - MX93_PAD_CCM_CLKO2__CCMSRCGPCMIX_CLKO2 | output after | +| | | - MX93_PAD_CCM_CLKO2__FLEXIO1_FLEXIO27 | power-up/reset | ++---------------------------+---------------------------+------------------------------------------------------+----------------------+ +| SD3_CMD | X11_SD3_CMD | - MX93_PAD_SD3_CMD__USDHC3_CMD | | +| | | - MX93_PAD_SD3_CMD__FLEXSPI1_A_SS0_B | | +| | | - MX93_PAD_SD3_CMD__FLEXIO1_FLEXIO21 | | +| | | - MX93_PAD_SD3_CMD__GPIO3_IO21 | | ++---------------------------+---------------------------+------------------------------------------------------+----------------------+ +| SPI_EXT_CLK | X11_SPI_EXT_CLK | - MX93_PAD_GPIO_IO11__GPIO2_IO11 | | +| | | - MX93_PAD_GPIO_IO11__LPSPI3_SCK | | +| | | - MX93_PAD_GPIO_IO11__MEDIAMIX_CAM_DATA05 | | +| | | - MX93_PAD_GPIO_IO11__MEDIAMIX_DISP_DATA07 | | +| | | - MX93_PAD_GPIO_IO11__TPM5_EXTCLK | | +| | | - MX93_PAD_GPIO_IO11__LPUART7_RTS_B | | +| | | - MX93_PAD_GPIO_IO11__LPI2C8_SCL | | +| | | - MX93_PAD_GPIO_IO11__FLEXIO1_FLEXIO11 | | ++---------------------------+---------------------------+------------------------------------------------------+----------------------+ +| SD3_D0 | X11_SD3_D0 | - MX93_PAD_SD3_DATA0__USDHC3_DATA0 | | +| | | - MX93_PAD_SD3_DATA0__FLEXSPI1_A_DATA00 | | +| | | - MX93_PAD_SD3_DATA0__FLEXIO1_FLEXIO22 | | +| | | - MX93_PAD_SD3_DATA0__GPIO3_IO22 | | ++---------------------------+---------------------------+------------------------------------------------------+----------------------+ +| SPI_EXT_MISO/LPUART7_RX | X11_SPI_EXT_MOSI | - MX93_PAD_GPIO_IO09__GPIO2_IO09 | | +| | | - MX93_PAD_GPIO_IO09__LPSPI3_SIN | | +| | | - MX93_PAD_GPIO_IO09__MEDIAMIX_CAM_DATA03 | | +| | | - MX93_PAD_GPIO_IO09__MEDIAMIX_DISP_DATA05 | | +| | | - MX93_PAD_GPIO_IO09__TPM3_EXTCLK | | +| | | - MX93_PAD_GPIO_IO09__LPUART7_RX | | +| | | - MX93_PAD_GPIO_IO09__LPI2C7_SCL | | +| | | - MX93_PAD_GPIO_IO09__FLEXIO1_FLEXIO09 | | ++---------------------------+---------------------------+------------------------------------------------------+----------------------+ +| SD3_D1 | X11_SD3_D1 | - MX93_PAD_SD3_DATA1__USDHC3_DATA1 | | +| | | - MX93_PAD_SD3_DATA1__FLEXSPI1_A_DATA01 | | +| | | - MX93_PAD_SD3_DATA1__FLEXIO1_FLEXIO23 | | +| | | - MX93_PAD_SD3_DATA1__GPIO3_IO23 | | ++---------------------------+---------------------------+------------------------------------------------------+----------------------+ +| SPI_EXT_MOSI | X11_SPI_EXT_MISO | - MX93_PAD_GPIO_IO10__GPIO2_IO10 | | +| | | - MX93_PAD_GPIO_IO10__LPSPI3_SOUT | | +| | | - MX93_PAD_GPIO_IO10__MEDIAMIX_CAM_DATA04 | | +| | | - MX93_PAD_GPIO_IO10__MEDIAMIX_DISP_DATA06 | | +| | | - MX93_PAD_GPIO_IO10__TPM4_EXTCLK | | +| | | - MX93_PAD_GPIO_IO10__LPUART7_CTS_B | | +| | | - MX93_PAD_GPIO_IO10__LPI2C8_SDA | | +| | | - MX93_PAD_GPIO_IO10__FLEXIO1_FLEXIO10 | | ++---------------------------+---------------------------+------------------------------------------------------+----------------------+ +| SD3_D2 | X11_SD3_D2 | - MX93_PAD_SD3_DATA2__USDHC3_DATA2 | | +| | | - MX93_PAD_SD3_DATA2__FLEXSPI1_A_DATA02 | | +| | | - MX93_PAD_SD3_DATA2__FLEXIO1_FLEXIO24 | | +| | | - MX93_PAD_SD3_DATA2__GPIO3_IO24 | | ++---------------------------+---------------------------+------------------------------------------------------+----------------------+ +| SPI_EXT_CS0/LPUART7_TX | X11_SPI_EXT_CS0 | - MX93_PAD_GPIO_IO08__GPIO2_IO08 | | +| | | - MX93_PAD_GPIO_IO08__LPSPI3_PCS0 | | +| | | - MX93_PAD_GPIO_IO08__MEDIAMIX_CAM_DATA02 | | +| | | - MX93_PAD_GPIO_IO08__MEDIAMIX_DISP_DATA04 | | +| | | - MX93_PAD_GPIO_IO08__TPM6_CH0 | | +| | | - MX93_PAD_GPIO_IO08__LPUART7_TX | | +| | | - MX93_PAD_GPIO_IO08__LPI2C7_SDA | | +| | | - MX93_PAD_GPIO_IO08__FLEXIO1_FLEXIO08 | | ++---------------------------+---------------------------+------------------------------------------------------+----------------------+ +| SD3_D3 | X11_SD3_D3 | - MX93_PAD_SD3_DATA3__USDHC3_DATA3 | | +| | | - MX93_PAD_SD3_DATA3__FLEXSPI1_A_DATA03 | | +| | | - MX93_PAD_SD3_DATA3__FLEXIO1_FLEXIO25 | | +| | | - MX93_PAD_SD3_DATA3__GPIO3_IO25 | | ++---------------------------+---------------------------+------------------------------------------------------+----------------------+ + ************** I²C Interfaces @@ -127,5 +287,9 @@ The i.MX93 on the Charge SOM provides several I²C interfaces: +----------+------------+-------------------------------------+-----------------+ | I2C5 | disabled | | disabled | +----------+------------+-------------------------------------+-----------------+ +| I2C7 | disabled | | disabled | ++----------+------------+-------------------------------------+-----------------+ +| I2C8 | disabled | | disabled | ++----------+------------+-------------------------------------+-----------------+ .. [#] This interface is only enabled in case of a Charge SOM Single Channel DC Carrier Board.