@@ -220,11 +220,18 @@ uint8_t ArduinoSPI::transfer(uint8_t data)
220220#endif
221221
222222#if 1
223- _spi_ctrl.p_regs ->SPDR_BY = data;
223+ if (_is_sci)
224+ {
225+
226+ }
227+ else
228+ {
229+ _spi_ctrl.p_regs ->SPDR_BY = data;
224230// while (0 == _spi_ctrl.p_regs->SPSR_b.SPTEF) {}
225231// while (_spi_ctrl.p_regs->SPSR_b.IDLNF) {}
226- while (0 == _spi_ctrl.p_regs ->SPSR_b .SPRF ) {}
227- rxbuf = _spi_ctrl.p_regs ->SPDR_BY ;
232+ while (0 == _spi_ctrl.p_regs ->SPSR_b .SPRF ) {}
233+ rxbuf = _spi_ctrl.p_regs ->SPDR_BY ;
234+ }
228235#endif
229236
230237 return rxbuf;
@@ -268,15 +275,43 @@ void ArduinoSPI::transfer(void *buf, size_t count)
268275#endif
269276
270277#if 1
271- uint8_t *buffer = (uint8_t *) buf;
278+ if (_is_sci)
279+ {
280+ }
281+ else
282+ {
283+ uint32_t *buffer32 = (uint32_t *) buf;
272284
273- for (size_t index = 0 ; index < count; index++)
285+ _spi_ctrl.p_regs ->SPDCR = R_SPI0_SPDCR_SPLW_Msk; /* SPI word access */
286+ _spi_ctrl.p_regs ->SPCMD_b [0 ].SPB = 2 ; /* spi bit width = 32 */
287+
288+ size_t n32 = count / 4 ;
289+ count &= 3U ;
290+
291+ for (;n32 > 0 ; n32--)
274292 {
275- _spi_ctrl.p_regs ->SPDR_BY = buffer[index];
293+ _spi_ctrl.p_regs ->SPDR = buffer32[0 ];
294+ while (0 == _spi_ctrl.p_regs ->SPSR_b .SPRF ) {}
295+ buffer32[0 ] = _spi_ctrl.p_regs ->SPDR ;
296+ buffer32++;
297+ }
298+
299+ _spi_ctrl.p_regs ->SPDCR = R_SPI0_SPDCR_SPBYT_Msk; /* SPI byte access */
300+ _spi_ctrl.p_regs ->SPCMD_b [0 ].SPB = 7 ; /* spi bit width = 8 */
301+
302+ uint8_t *buffer = (uint8_t *) buffer32;
303+
304+ for (; count > 0 ; count--)
305+ {
306+ _spi_ctrl.p_regs ->SPDR_BY = buffer[0 ];
276307 while (0 == _spi_ctrl.p_regs ->SPSR_b .SPRF ) {}
277- buffer[index] = _spi_ctrl.p_regs ->SPDR_BY ;
308+ buffer[0 ] = _spi_ctrl.p_regs ->SPDR_BY ;
309+ buffer++;
278310 }
279- while (_spi_ctrl.p_regs ->SPSR_b .IDLNF ) {}
311+
312+ while (_spi_ctrl.p_regs ->SPSR_b .IDLNF ) {}
313+ }
314+
280315#endif
281316}
282317
@@ -482,6 +517,10 @@ void ArduinoSPI::configSpi(arduino::SPISettings const & settings)
482517
483518 _spi_ctrl.p_regs ->SPDCR_b .SPBYT = 1 ; /* SPI byte access */
484519
520+ /* register undocumented for the RA4M1 but found to be working and necessary */
521+ /* BYSW - Byte Swap Operating Mode Select - 1 = Byte Swap ON - essential for 32 bit transfers */
522+ _spi_ctrl.p_regs ->SPDCR2_b .BYSW = 1 ;
523+
485524 _spi_ctrl.p_regs ->SPSR ; /* read to clear OVRF */
486525 _spi_ctrl.p_regs ->SPSR = 0 ; /* clear status register */
487526
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