@@ -317,12 +317,12 @@ int HM01B0::init()
317317 }
318318
319319 for (uint32_t i=0 ; himax_default_regs[i][0 ]; i++) {
320- reg_write (HM01B0_I2C_ADDR, himax_default_regs[i][0 ], himax_default_regs[i][1 ], true );
320+ regWrite (HM01B0_I2C_ADDR, himax_default_regs[i][0 ], himax_default_regs[i][1 ], true );
321321 }
322322
323- reg_write (HM01B0_I2C_ADDR, PCLK_POLARITY, (0x20 | PCLK_FALLING_EDGE), true );
323+ regWrite (HM01B0_I2C_ADDR, PCLK_POLARITY, (0x20 | PCLK_FALLING_EDGE), true );
324324
325- reg_write (HM01B0_I2C_ADDR, MODE_SELECT, HIMAX_Streaming, true );
325+ regWrite (HM01B0_I2C_ADDR, MODE_SELECT, HIMAX_Streaming, true );
326326
327327 HAL_Delay (200 );
328328
@@ -333,9 +333,9 @@ int HM01B0::reset()
333333{
334334 uint32_t max_timeout=100 ;
335335 do {
336- reg_write (HM01B0_I2C_ADDR, SW_RESET, HIMAX_RESET, true );
336+ regWrite (HM01B0_I2C_ADDR, SW_RESET, HIMAX_RESET, true );
337337 delay (1 );
338- } while (reg_read (HM01B0_I2C_ADDR, MODE_SELECT, true ) != HIMAX_Standby && ((--max_timeout)>0 ) );
338+ } while (regRead (HM01B0_I2C_ADDR, MODE_SELECT, true ) != HIMAX_Standby && ((--max_timeout)>0 ) );
339339
340340 return (max_timeout > 0 ) ? 0 : -1 ;
341341}
@@ -347,17 +347,17 @@ int HM01B0::setResolution(int32_t resolution)
347347 switch (resolution) {
348348 case CAMERA_R160x120:
349349 for (uint32_t i = 0 ; himax_qqvga_regs[i][0 ]; i++) {
350- ret |= reg_write (HM01B0_I2C_ADDR, himax_qqvga_regs[i][0 ], himax_qqvga_regs[i][1 ], true );
350+ ret |= regWrite (HM01B0_I2C_ADDR, himax_qqvga_regs[i][0 ], himax_qqvga_regs[i][1 ], true );
351351 }
352352 break ;
353353 case CAMERA_R320x240:
354354 for (uint32_t i = 0 ; himax_qvga_regs[i][0 ]; i++) {
355- ret |= reg_write (HM01B0_I2C_ADDR, himax_qvga_regs[i][0 ], himax_qvga_regs[i][1 ], true );
355+ ret |= regWrite (HM01B0_I2C_ADDR, himax_qvga_regs[i][0 ], himax_qvga_regs[i][1 ], true );
356356 }
357357 break ;
358358 case CAMERA_R320x320:
359359 for (uint32_t i = 0 ; himax_full_regs[i][0 ]; i++) {
360- ret |= reg_write (HM01B0_I2C_ADDR, himax_full_regs[i][0 ], himax_full_regs[i][1 ], true );
360+ ret |= regWrite (HM01B0_I2C_ADDR, himax_full_regs[i][0 ], himax_full_regs[i][1 ], true );
361361 }
362362 break ;
363363 default :
@@ -371,7 +371,7 @@ int HM01B0::setFrameRate(int32_t framerate)
371371{
372372 uint8_t osc_div = 0 ;
373373 // binning is enabled for QQVGA
374- uint8_t binning = reg_read (HM01B0_I2C_ADDR, BINNING_MODE, true ) & 0x03 ;
374+ uint8_t binning = regRead (HM01B0_I2C_ADDR, BINNING_MODE, true ) & 0x03 ;
375375
376376 switch (framerate) {
377377 case 15 :
@@ -391,7 +391,7 @@ int HM01B0::setFrameRate(int32_t framerate)
391391 return -1 ;
392392 }
393393
394- return reg_write (HM01B0_I2C_ADDR, OSC_CLK_DIV, 0x08 | osc_div, true );
394+ return regWrite (HM01B0_I2C_ADDR, OSC_CLK_DIV, 0x08 | osc_div, true );
395395}
396396
397397int HM01B0::setPixelFormat (int32_t pixformat)
@@ -402,19 +402,19 @@ int HM01B0::setPixelFormat(int32_t pixformat)
402402int HM01B0::setTestPattern (bool enable, bool walking)
403403{
404404 uint8_t reg = 0 ;
405- reg_write (HM01B0_I2C_ADDR, PCLK_POLARITY, (0x20 | PCLK_FALLING_EDGE), true );
406- reg_write (HM01B0_I2C_ADDR, 0x2100 , 0 , true ); // AE
407- reg_write (HM01B0_I2C_ADDR, 0x1000 , 0 , true ); // BLC
408- reg_write (HM01B0_I2C_ADDR, 0x1008 , 0 , true ); // DPC
409- reg_write (HM01B0_I2C_ADDR, 0x0205 , 0 , true ); // AGAIN
410- reg_write (HM01B0_I2C_ADDR, 0x020e , 1 , true ); // DGAINH
411- reg_write (HM01B0_I2C_ADDR, 0x020f , 0 , true ); // DGAINL
405+ regWrite (HM01B0_I2C_ADDR, PCLK_POLARITY, (0x20 | PCLK_FALLING_EDGE), true );
406+ regWrite (HM01B0_I2C_ADDR, 0x2100 , 0 , true ); // AE
407+ regWrite (HM01B0_I2C_ADDR, 0x1000 , 0 , true ); // BLC
408+ regWrite (HM01B0_I2C_ADDR, 0x1008 , 0 , true ); // DPC
409+ regWrite (HM01B0_I2C_ADDR, 0x0205 , 0 , true ); // AGAIN
410+ regWrite (HM01B0_I2C_ADDR, 0x020e , 1 , true ); // DGAINH
411+ regWrite (HM01B0_I2C_ADDR, 0x020f , 0 , true ); // DGAINL
412412
413413 if (enable) {
414414 reg = 1 | (walking ? (1 << 4 ) : 0 );
415415 }
416- reg_write (HM01B0_I2C_ADDR, 0x0601 , reg, true );
417- reg_write (HM01B0_I2C_ADDR, 0x0104 , 1 , true ); // group hold
416+ regWrite (HM01B0_I2C_ADDR, 0x0601 , reg, true );
417+ regWrite (HM01B0_I2C_ADDR, 0x0104 , 1 , true ); // group hold
418418
419419 HAL_Delay (100 );
420420
@@ -431,20 +431,20 @@ int HM01B0::setMotionDetectionThreshold(uint32_t threshold)
431431 //
432432 // In other words, motion is detected if the abs difference of the ROI mean and the
433433 // average ROI mean of the last 8 or 16 frames is higher than (ROI mean * threshold / 64).
434- return reg_write (HM01B0_I2C_ADDR, MD_THL, (threshold < 3 ) ? 3 : (threshold > 0xF0 ) ? 0xF0 : threshold, true );
434+ return regWrite (HM01B0_I2C_ADDR, MD_THL, (threshold < 3 ) ? 3 : (threshold > 0xF0 ) ? 0xF0 : threshold, true );
435435}
436436
437437int HM01B0::setMotionDetectionWindow (uint32_t x, uint32_t y, uint32_t w, uint32_t h)
438438{
439439 int ret = 0 ;
440- ret |= reg_write (HM01B0_I2C_ADDR, MD_LROI_X_START_H, (x>>8 ), true );
441- ret |= reg_write (HM01B0_I2C_ADDR, MD_LROI_X_START_L, (x&0xff ), true );
442- ret |= reg_write (HM01B0_I2C_ADDR, MD_LROI_Y_START_H, (y>>8 ), true );
443- ret |= reg_write (HM01B0_I2C_ADDR, MD_LROI_Y_START_L, (y&0xff ), true );
444- ret |= reg_write (HM01B0_I2C_ADDR, MD_LROI_X_END_H, (w>>8 ), true );
445- ret |= reg_write (HM01B0_I2C_ADDR, MD_LROI_X_END_L, (w&0xff ), true );
446- ret |= reg_write (HM01B0_I2C_ADDR, MD_LROI_Y_END_H, (h>>8 ), true );
447- ret |= reg_write (HM01B0_I2C_ADDR, MD_LROI_Y_END_L, (h&0xff ), true );
440+ ret |= regWrite (HM01B0_I2C_ADDR, MD_LROI_X_START_H, (x>>8 ), true );
441+ ret |= regWrite (HM01B0_I2C_ADDR, MD_LROI_X_START_L, (x&0xff ), true );
442+ ret |= regWrite (HM01B0_I2C_ADDR, MD_LROI_Y_START_H, (y>>8 ), true );
443+ ret |= regWrite (HM01B0_I2C_ADDR, MD_LROI_Y_START_L, (y&0xff ), true );
444+ ret |= regWrite (HM01B0_I2C_ADDR, MD_LROI_X_END_H, (w>>8 ), true );
445+ ret |= regWrite (HM01B0_I2C_ADDR, MD_LROI_X_END_L, (w&0xff ), true );
446+ ret |= regWrite (HM01B0_I2C_ADDR, MD_LROI_Y_END_H, (h>>8 ), true );
447+ ret |= regWrite (HM01B0_I2C_ADDR, MD_LROI_Y_END_L, (h&0xff ), true );
448448 return ret;
449449}
450450
@@ -456,15 +456,15 @@ int HM01B0::enableMotionDetection(md_callback_t callback)
456456 md_irq.enable_irq ();
457457
458458 int ret = clearMotionDetection ();
459- ret |= reg_write (HM01B0_I2C_ADDR, MD_CTRL, 1 , true );
459+ ret |= regWrite (HM01B0_I2C_ADDR, MD_CTRL, 1 , true );
460460 return ret;
461461}
462462
463463int HM01B0::disableMotionDetection ()
464464{
465465 _md_callback = NULL ;
466466 int ret = clearMotionDetection ();
467- ret |= reg_write (HM01B0_I2C_ADDR, MD_CTRL, 0 , true );
467+ ret |= regWrite (HM01B0_I2C_ADDR, MD_CTRL, 0 , true );
468468 return ret;
469469}
470470
@@ -481,12 +481,12 @@ int HM01B0::motionDetected()
481481
482482int HM01B0::pollMotionDetection ()
483483{
484- return reg_read (HM01B0_I2C_ADDR, MD_INTERRUPT, true );
484+ return regRead (HM01B0_I2C_ADDR, MD_INTERRUPT, true );
485485}
486486
487487int HM01B0::clearMotionDetection ()
488488{
489- return reg_write (HM01B0_I2C_ADDR, I2C_CLEAR, 0x01 , true );
489+ return regWrite (HM01B0_I2C_ADDR, I2C_CLEAR, 0x01 , true );
490490}
491491
492492uint8_t HM01B0::printRegs ()
@@ -495,12 +495,12 @@ uint8_t HM01B0::printRegs()
495495 printf (" 0x%04X: 0x%02X 0x%02X \n " ,
496496 himax_default_regs[i][0 ],
497497 himax_default_regs[i][1 ],
498- reg_read (HM01B0_I2C_ADDR, himax_default_regs[i][0 ], true ));
498+ regRead (HM01B0_I2C_ADDR, himax_default_regs[i][0 ], true ));
499499 }
500500 return 0 ;
501501}
502502
503- int HM01B0::reg_write (uint8_t dev_addr, uint16_t reg_addr, uint8_t reg_data, bool wide_addr)
503+ int HM01B0::regWrite (uint8_t dev_addr, uint16_t reg_addr, uint8_t reg_data, bool wide_addr)
504504{
505505 _i2c->beginTransmission (dev_addr);
506506 uint8_t buf[3 ] = {(uint8_t ) (reg_addr >> 8 ), (uint8_t ) (reg_addr & 0xFF ), reg_data};
@@ -511,7 +511,7 @@ int HM01B0::reg_write(uint8_t dev_addr, uint16_t reg_addr, uint8_t reg_data, boo
511511 return _i2c->endTransmission ();
512512}
513513
514- uint8_t HM01B0::reg_read (uint8_t dev_addr, uint16_t reg_addr, bool wide_addr)
514+ uint8_t HM01B0::regRead (uint8_t dev_addr, uint16_t reg_addr, bool wide_addr)
515515{
516516 uint8_t reg_data = 0 ;
517517 uint8_t buf[2 ] = {(uint8_t ) (reg_addr >> 8 ), (uint8_t ) (reg_addr & 0xFF )};
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