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add some debugging output
1 parent b66f434 commit a35a53a

2 files changed

Lines changed: 18 additions & 8 deletions

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zjit/src/backend/arm64/mod.rs

Lines changed: 18 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -893,6 +893,7 @@ impl Assembler {
893893
}
894894
// Resolve ParallelMov that couldn't be handled without a scratch register.
895895
Insn::ParallelMov { moves } => {
896+
panic!();
896897
for (dst, src) in Self::resolve_parallel_moves(moves, Some(SCRATCH0_OPND)).unwrap() {
897898
let src = split_stack_membase(asm, src, SCRATCH1_OPND, &stack_state);
898899
let dst = split_large_disp(asm, dst, SCRATCH2_OPND);
@@ -1642,6 +1643,23 @@ impl Assembler {
16421643

16431644
let (assignments, num_stack_slots) = asm.linear_scan(intervals.clone(), regs.len());
16441645

1646+
// Dump vreg-to-physical-register mapping if requested
1647+
if let Some(crate::options::Options { dump_lir: Some(dump_lirs), .. }) = unsafe { crate::options::OPTIONS.as_ref() } {
1648+
if dump_lirs.contains(&crate::options::DumpLIR::alloc_regs) {
1649+
println!("VReg assignments:");
1650+
for (i, alloc) in assignments.iter().enumerate() {
1651+
if let Some(alloc) = alloc {
1652+
let range = &intervals[i].range;
1653+
let alloc_str = match alloc {
1654+
Allocation::Reg(n) => format!("{}", regs[*n]),
1655+
Allocation::Stack(n) => format!("Stack[{}]", n),
1656+
};
1657+
println!(" v{} => {} (range: {:?}..{:?})", i, alloc_str, range.start, range.end);
1658+
}
1659+
}
1660+
}
1661+
}
1662+
16451663
// Update FrameSetup slot_count to account for spilled VRegs
16461664
if num_stack_slots > 0 {
16471665
for block in asm.basic_blocks.iter_mut() {

zjit/src/backend/lir.rs

Lines changed: 0 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -2237,14 +2237,6 @@ impl Assembler
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})
22382238
.collect();
22392239

2240-
// Append non-register moves. Moves to memory/stack must come before
2241-
// moves to registers, because a register-destination move may clobber
2242-
// a source needed by a memory-destination move.
2243-
imm_moves.sort_by_key(|m| {
2244-
if let Insn::Mov { dest: Opnd::Reg(_), .. } = m { 1 } else { 0 }
2245-
});
2246-
moves.extend(imm_moves);
2247-
22482240
if moves.is_empty() {
22492241
continue;
22502242
}

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