From 3241912ee8dcb1416ef9d2109a733507c6ef0fd5 Mon Sep 17 00:00:00 2001 From: "copilot-swe-agent[bot]" <198982749+Copilot@users.noreply.github.com> Date: Tue, 11 Nov 2025 01:18:25 +0000 Subject: [PATCH 1/3] Initial plan From 4dc072c04c70f88fa7fcb3cd4558cb06e51b66c9 Mon Sep 17 00:00:00 2001 From: "copilot-swe-agent[bot]" <198982749+Copilot@users.noreply.github.com> Date: Tue, 11 Nov 2025 01:24:47 +0000 Subject: [PATCH 2/3] [libcpu][cortex-a] Improve FPU stack initialization implementation Co-authored-by: BernardXiong <1241087+BernardXiong@users.noreply.github.com> --- libcpu/arm/cortex-a/cpuport.h | 5 +++++ libcpu/arm/cortex-a/stack.c | 13 ++++++++++++- 2 files changed, 17 insertions(+), 1 deletion(-) diff --git a/libcpu/arm/cortex-a/cpuport.h b/libcpu/arm/cortex-a/cpuport.h index 5fb067999cc..c18ae246b20 100644 --- a/libcpu/arm/cortex-a/cpuport.h +++ b/libcpu/arm/cortex-a/cpuport.h @@ -72,6 +72,11 @@ struct rt_hw_stack #define E_Bit (1<<9) #define J_Bit (1<<24) +/* VFP/NEON register count for FPU context */ +#ifndef VFP_DATA_NR +#define VFP_DATA_NR 64 /* 32 double-precision registers = 64 words */ +#endif + #ifdef RT_USING_SMP typedef union { unsigned long slock; diff --git a/libcpu/arm/cortex-a/stack.c b/libcpu/arm/cortex-a/stack.c index 4c955677f87..0117514c617 100644 --- a/libcpu/arm/cortex-a/stack.c +++ b/libcpu/arm/cortex-a/stack.c @@ -31,6 +31,9 @@ rt_uint8_t *rt_hw_stack_init(void *tentry, void *parameter, rt_uint8_t *stack_addr, void *texit) { rt_uint32_t *stk; +#ifdef RT_USING_FPU + rt_uint32_t i; +#endif stack_addr += sizeof(rt_uint32_t); stack_addr = (rt_uint8_t *)RT_ALIGN_DOWN((rt_uint32_t)stack_addr, 8); @@ -61,7 +64,15 @@ rt_uint8_t *rt_hw_stack_init(void *tentry, void *parameter, *(--stk) = 0; /* user sp*/ #endif #ifdef RT_USING_FPU - *(--stk) = 0; /* not use fpu*/ + /* FPU context initialization matches context_gcc.S restore order: + * Stack layout (high to low): FPEXC -> FPSCR -> D16-D31 -> D0-D15 + */ + for (i = 0; i < VFP_DATA_NR; i++) + { + *(--stk) = 0; /* Initialize D0-D31 (64 words for 32 double regs) */ + } + *(--stk) = 0; /* FPSCR: Floating-Point Status and Control Register */ + *(--stk) = 0x40000000; /* FPEXC: Enable FPU (bit 30 = EN) */ #endif /* return task's current stack address */ From 06eae477b8b83774e32814cfa7bc87e65c53a439 Mon Sep 17 00:00:00 2001 From: "copilot-swe-agent[bot]" <198982749+Copilot@users.noreply.github.com> Date: Tue, 11 Nov 2025 01:31:53 +0000 Subject: [PATCH 3/3] [libcpu][cortex-a] Replace FPU init loop with rt_memset Co-authored-by: BernardXiong <1241087+BernardXiong@users.noreply.github.com> --- libcpu/arm/cortex-a/stack.c | 9 ++------- 1 file changed, 2 insertions(+), 7 deletions(-) diff --git a/libcpu/arm/cortex-a/stack.c b/libcpu/arm/cortex-a/stack.c index 0117514c617..5bb57ca4dd4 100644 --- a/libcpu/arm/cortex-a/stack.c +++ b/libcpu/arm/cortex-a/stack.c @@ -31,9 +31,6 @@ rt_uint8_t *rt_hw_stack_init(void *tentry, void *parameter, rt_uint8_t *stack_addr, void *texit) { rt_uint32_t *stk; -#ifdef RT_USING_FPU - rt_uint32_t i; -#endif stack_addr += sizeof(rt_uint32_t); stack_addr = (rt_uint8_t *)RT_ALIGN_DOWN((rt_uint32_t)stack_addr, 8); @@ -67,10 +64,8 @@ rt_uint8_t *rt_hw_stack_init(void *tentry, void *parameter, /* FPU context initialization matches context_gcc.S restore order: * Stack layout (high to low): FPEXC -> FPSCR -> D16-D31 -> D0-D15 */ - for (i = 0; i < VFP_DATA_NR; i++) - { - *(--stk) = 0; /* Initialize D0-D31 (64 words for 32 double regs) */ - } + stk -= VFP_DATA_NR; + rt_memset(stk, 0, VFP_DATA_NR * sizeof(rt_uint32_t)); /* Initialize D0-D31 (64 words for 32 double regs) */ *(--stk) = 0; /* FPSCR: Floating-Point Status and Control Register */ *(--stk) = 0x40000000; /* FPEXC: Enable FPU (bit 30 = EN) */ #endif