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Copy file name to clipboardExpand all lines: docs/zkEVM/zkprover/the-processor.md
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@@ -19,7 +19,7 @@ Instead of executing all the various computations on its own, the Main SM achiev
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-[Keccak SM](/zkevm/zkProver/keccakf-sm.md) which is a binary circuit that computes hash values of strings as instructed by the Main SM. And, it is implemented within a special framework, detailed [here](/zkevm/zkProver/keccak-framework.md).
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-[Poseidon SM](/zkevm/zkProver/poseidon-sm.md) which specialises with computing hash values required in building Sparse Merkle Trees as per the Main SM instructions.
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There are other *auxiliary* state machines used in the zkProver; the [Padding-KK](/zkevm/zkProver/paddingkk-sm.md), the [Padding-KK-Bit](/zkevm/zkProver/paddingkk-bit-sm.md), the Padding-PG SM, the [Memory Align SM](/zkevm/zkProver/mem-align-sm.md), the [Bits2Field SM](/zkevm/zkProver/bits2field-sm.md) and the ROM SM ([sm_rom.js](https://github.com/0xPolygonHermez/zkevm-proverjs/blob/main/src/sm/sm_rom.js)).
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There are other *auxiliary* state machines used in the zkProver; the [Padding-KK](/zkEVM/zkProver/paddingkk-sm.md), the [Padding-KK-Bit](/zkProver/paddingkk-bit-sm.md), the Padding-PG SM, the [Memory Align SM](/zkProver/mem-align-sm.md), the [Bits2Field SM](/zkEVM/zkProver/bits2field-sm.md) and the ROM SM ([sm_rom.js](https://github.com/0xPolygonHermez/zkevm-proverjs/blob/main/src/sm/sm_rom.js)).
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## Algebraic Processor
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The figure below displays the Main SM's state transition, showing the generic registers, the selector registers, setter registers and the `OP` register.
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The output value of each register is given by:
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The figure below depicts the Main SM's simplified state transition in accordance with ROM instructions.
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- $\texttt{STEP}$: The **Step Register** is used to store the number of instructions executed so far in the current transaction.
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The figure below depicts registers contributing to the $\texttt{addr}$ register and its use in secondary state machines such as the Memory SM, KeccakF SM, PoseidonG SM and the Storage SM.
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Many of these instructions generate some data and this data is injected into $\texttt{OP}$ via the $\texttt{FREE}\ \texttt{0...7}$ register, where $\texttt{FREE}$ means a free input.
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