Merge branch 'AliceO2Group:master' into master

Author: ananthapadmanabhan18

ALICE3/TableProducer/alice3-multicharmTable.cxx

@@ -723,7 +723,7 @@ struct alice3multicharmTable {
             histos.fill(HIST("hDCAxyXiCC"), std::fabs(xiccdcaXY * 1e+4));
             histos.fill(HIST("hDCAzXiCC"), std::fabs(xiccdcaZ * 1e+4));
 
-            if (std::fabs(thisXiCcandidate.eta) > xiccMaxEta)
+            if (std::fabs(thisXiCCcandidate.eta) > xiccMaxEta)
               continue; // not in central barrel
 
             histos.fill(HIST("hCharmBuilding"), 3.0f);

Common/CCDB/ctpRateFetcher.cxx

@@ -109,7 +109,7 @@ void ctpRateFetcher::setupRun(int runNumber, o2::ccdb::BasicCCDBManager* ccdb, u
     delete mScalers;
     delete mLHCIFdata;
   }
-  std::map<string, string> metadata;
+  std::map<std::string, std::string> metadata;
   mLHCIFdata = ccdb->getSpecific<parameters::GRPLHCIFData>("GLO/Config/GRPLHCIF", timeStamp, metadata);
   if (mLHCIFdata == nullptr) {
     LOG(fatal) << "GRPLHCIFData not in database, timestamp:" << timeStamp;

Common/TableProducer/eventSelection.cxx

@@ -1286,7 +1286,7 @@ struct LumiTask {
         LOGP(warn, "Cross section for z={} + z={} @ {} GeV is not defined", beamZ1, beamZ2, sqrts);
       }
       // getting CTP config to extract lumi class indices (used for rate fetching and pileup correction)
-      std::map<string, string> metadata;
+      std::map<std::string, std::string> metadata;
       metadata["runNumber"] = std::to_string(run);
       auto config = ccdb->getSpecific<o2::ctp::CTPConfiguration>("CTP/Config/Config", ts, metadata);
       auto classes = config->getCTPClasses();

Common/TableProducer/multiplicityExtraTable.cxx

@@ -36,6 +36,9 @@ struct MultiplicityExtraTable {
   Produces<aod::Mults2BC> mult2bc;
   Produces<aod::BC2Mults> bc2mult;
 
+  // auxiliary for MC
+  Produces<aod::MultHepMCHIs> multHepMCHIs;
+
   // Allow for downscaling of BC table for less space use in derived data
   Configurable<float> bcDownscaleFactor{"bcDownscaleFactor", 2, "Downscale factor for BC table (0: save nothing, 1: save all)"};
   Configurable<float> minFT0CforBCTable{"minFT0CforBCTable", 25.0f, "Minimum FT0C amplitude to fill BC table to reduce data"};
@@ -277,9 +280,22 @@ struct MultiplicityExtraTable {
     }
   }
 
+  void processHepMCHeavyIons(aod::HepMCHeavyIons const& hepmchis)
+  {
+    for (auto const& hepmchi : hepmchis) {
+      multHepMCHIs(hepmchi.mcCollisionId(),
+                   hepmchi.ncollHard(),
+                   hepmchi.npartProj(),
+                   hepmchi.npartTarg(),
+                   hepmchi.ncoll(),
+                   hepmchi.impactParameter());
+    }
+  }
+
   // Process switches
   PROCESS_SWITCH(MultiplicityExtraTable, processBCs, "Produce BC tables", true);
   PROCESS_SWITCH(MultiplicityExtraTable, processCollisionNeighbors, "Produce neighbor timing tables", true);
+  PROCESS_SWITCH(MultiplicityExtraTable, processHepMCHeavyIons, "Produce MultHepMCHIs tables", false);
 };
 
 WorkflowSpec defineDataProcessing(ConfigContext const& cfgc)

Common/TableProducer/qVectorsTable.cxx

@@ -154,7 +154,7 @@ struct qVectorsTable {
   Produces<aod::QvectorBTotVecs> qVectorBTotVec;
   /////////////////////////////////////////////////////////////////
 
-  std::unordered_map<string, bool> useDetector = {
+  std::unordered_map<std::string, bool> useDetector = {
     {"QvectorBTots", cfgUseBTot},
     {"QvectorBNegs", cfgUseBNeg},
     {"QvectorBPoss", cfgUseBPos},

Common/Tasks/qVectorsCorrection.cxx

@@ -68,14 +68,15 @@ struct qVectorsCorrection {
   Configurable<std::string> cfgRefBName{"cfgRefBName", "TPCneg", "The name of detector for reference B"};
   Configurable<bool> cfgAddEvtSel{"cfgAddEvtSel", true, "event selection"};
 
+  Configurable<int> cfgEvtSel{"cfgEvtSel", 0, "Event selection flags\n0: Sel8\n1: Sel8+kIsGoodZvtxFT0vsPV+kNoSameBunchPileup\n2: Sel8+kIsGoodZvtxFT0vsPV+kNoSameBunchPileup+kNoCollInTimeRangeStandard\n3: Sel8+kNoSameBunchPileup"};
+
   Configurable<int> cfgnTotalSystem{"cfgnTotalSystem", 7, "total qvector number"};
   Configurable<int> cfgNbinsEP{"cfgNbinsEP", 360, "nbins for EP histograms"};
 
   Configurable<bool> cfgQAAll{"cfgQAAll", false, "draw all q-vector steps"};
   Configurable<bool> cfgQAFinal{"cfgQAFinal", false, "draw final q-vector steps"};
   Configurable<bool> cfgQAFlowStudy{"cfgQAFlowStudy", false, "configurable for flow study"};
   Configurable<bool> cfgQAOccupancyStudy{"cfgQAOccupancyStudy", false, "configurable for occupancy study"};
-  Configurable<bool> cfgAddEvtSelPileup{"cfgAddEvtSelPileup", false, "configurable for pileup selection"};
 
   Configurable<float> cfgMinPt{"cfgMinPt", 0.15, "Minimum transverse momentum for charged track"};
   Configurable<float> cfgMaxEta{"cfgMaxEta", 0.8, "Maximum pseudorapidiy for charged track"};
@@ -541,16 +542,31 @@ struct qVectorsCorrection {
   void process(MyCollisions::iterator const& qVec, MyTracks const& tracks)
   {
     histosQA.fill(HIST("histCentFull"), qVec.cent());
-    if (cfgAddEvtSel && (!qVec.sel8() ||
-                         !qVec.selection_bit(aod::evsel::kIsGoodZvtxFT0vsPV) ||
-                         !qVec.selection_bit(aod::evsel::kNoSameBunchPileup))) {
-      return;
-    }
-    if (cfgAddEvtSel && (qVec.trackOccupancyInTimeRange() > cfgMaxOccupancy || qVec.trackOccupancyInTimeRange() < cfgMinOccupancy)) {
-      return;
-    }
-    if (cfgAddEvtSelPileup && !qVec.selection_bit(o2::aod::evsel::kNoCollInTimeRangeStandard)) {
-      return;
+    if (cfgAddEvtSel) {
+      switch (cfgEvtSel) {
+        case 0: // Sel8
+          if (!qVec.sel8())
+            return;
+          break;
+        case 1: // PbPb standard
+          if (!qVec.sel8() || !qVec.selection_bit(aod::evsel::kIsGoodZvtxFT0vsPV) || !qVec.selection_bit(aod::evsel::kNoSameBunchPileup))
+            return;
+          break;
+        case 2: // PbPb with pileup
+          if (!qVec.sel8() || !qVec.selection_bit(o2::aod::evsel::kNoCollInTimeRangeStandard) ||
+              !qVec.selection_bit(aod::evsel::kIsGoodZvtxFT0vsPV) || !qVec.selection_bit(aod::evsel::kNoSameBunchPileup))
+            return;
+          break;
+        case 3: // Small systems (OO, NeNe, pp)
+          if (!qVec.sel8() || !qVec.selection_bit(aod::evsel::kNoSameBunchPileup))
+            return;
+          break;
+        default:
+          LOGF(warning, "Event selection flag was not found, continuing without basic event selections!\n");
+      }
+      // Check occupancy
+      if (qVec.trackOccupancyInTimeRange() > cfgMaxOccupancy || qVec.trackOccupancyInTimeRange() < cfgMinOccupancy)
+        return;
     }
 
     for (uint i = 0; i < cfgnMods->size(); i++) {